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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/include/linux/rockchip/rockchip_sip.h
....@@ -52,6 +52,14 @@
5252 #define SIP_SDEI_FIQ_DBG_SWITCH_CPU	0x82000020
5353 #define SIP_SDEI_FIQ_DBG_GET_EVENT_ID	0x82000021
5454 #define RK_SIP_AMP_CFG			0x82000022
55
+#define RK_SIP_FIQ_CTRL			0x82000024
56
+#define SIP_HDCP_CONFIG			0x82000025
57
+#define SIP_WDT_CFG			0x82000026
58
+#define SIP_HDMIRX_CFG			0x82000027
59
+#define SIP_MCU_CFG			0x82000028
60
+#define SIP_PVTPLL_CFG			0x82000029
61
+
62
+#define TRUSTED_OS_HDCPKEY_INIT		0xB7000003
5563 
5664 /* Rockchip Sip version */
5765 #define SIP_IMPLEMENT_V1                (1)
....@@ -100,6 +108,8 @@
100108 #define VIRTUAL_POWEROFF		0x07
101109 #define SUSPEND_WFI_TIME_MS		0x08
102110 #define LINUX_PM_STATE			0x09
111
+#define SUSPEND_IO_RET_CONFIG		0x0a
112
+#define SLEEP_PIN_CONFIG		0x0b
103113 
104114 /* SIP_REMOTECTL_CFG call types */
105115 #define	REMOTECTL_SET_IRQ		0xf0
....@@ -109,6 +119,38 @@
109119 #define REMOTECTL_ENABLE		0xf4
110120 /* wakeup state */
111121 #define REMOTECTL_PWRKEY_WAKEUP		0xdeadbeaf
122
+
123
+/* SIP_MCU_CFG child configs, MCU ID */
124
+enum {
125
+	RK_BUS_MCU,
126
+	RK_PMU_MCU,
127
+	RK_DDR_MCU,
128
+	RK_NPU_MCU,
129
+};
130
+
131
+#define RK_SIP_MCU_ID(type, id)		((type) << 8 | id)
132
+
133
+#define RK_SIP_CFG_BUSMCU_0_ID		RK_SIP_MCU_ID(RK_BUS_MCU, 0)
134
+#define RK_SIP_CFG_BUSMCU_1_ID		RK_SIP_MCU_ID(RK_BUS_MCU, 1)
135
+#define RK_SIP_CFG_PMUMCU_0_ID		RK_SIP_MCU_ID(RK_PMU_MCU, 0)
136
+#define RK_SIP_CFG_DDRMCU_0_ID		RK_SIP_MCU_ID(RK_DDR_MCU, 0)
137
+#define RK_SIP_CFG_NPUMCU_0_ID		RK_SIP_MCU_ID(RK_NPU_MCU, 0)
138
+
139
+/* SIP_MCU_CFG child configs */
140
+#define CONFIG_MCU_CODE_START_ADDR	0x01
141
+#define CONFIG_MCU_EXPERI_START_ADDR	0x02
142
+#define CONFIG_MCU_SRAM_START_ADDR	0x03
143
+#define CONFIG_MCU_EXSRAM_START_ADDR	0x04
144
+
145
+struct dram_addrmap_info {
146
+	u64 ch_mask[2];
147
+	u64 bk_mask[4];
148
+	u64 bg_mask[2];
149
+	u64 cs_mask[2];
150
+	u32 reserved[20];
151
+	u32 bank_bit_first;
152
+	u32 bank_bit_mask;
153
+};
112154 
113155 /* AMP Ctrl */
114156 enum {
....@@ -120,16 +162,6 @@
120162 	RK_AMP_SUB_FUNC_RSV, /* for RTOS */
121163 	RK_AMP_SUB_FUNC_CPU_ON,
122164 	RK_AMP_SUB_FUNC_END,
123
-};
124
-
125
-struct dram_addrmap_info {
126
-	u64 ch_mask[2];
127
-	u64 bk_mask[4];
128
-	u64 bg_mask[2];
129
-	u64 cs_mask[2];
130
-	u32 reserved[20];
131
-	u32 bank_bit_first;
132
-	u32 bank_bit_mask;
133165 };
134166 
135167 enum {
....@@ -150,8 +182,60 @@
150182 	SHARE_PAGE_TYPE_DDRFSP,
151183 	SHARE_PAGE_TYPE_DDR_ADDRMAP,
152184 	SHARE_PAGE_TYPE_LAST_LOG,
185
+	SHARE_PAGE_TYPE_HDCP,
186
+	SHARE_PAGE_TYPE_SLEEP,
153187 	SHARE_PAGE_TYPE_MAX,
154188 } share_page_type_t;
189
+
190
+/* fiq control sub func */
191
+enum {
192
+	RK_SIP_FIQ_CTRL_FIQ_EN = 1,
193
+	RK_SIP_FIQ_CTRL_FIQ_DIS,
194
+	RK_SIP_FIQ_CTRL_SET_AFF
195
+};
196
+
197
+/* hdcp function types */
198
+enum {
199
+	HDCP_FUNC_STORAGE_INCRYPT = 1,
200
+	HDCP_FUNC_KEY_LOAD,
201
+	HDCP_FUNC_ENCRYPT_MODE
202
+};
203
+
204
+/* support hdcp device list */
205
+enum {
206
+	DP_TX0,
207
+	DP_TX1,
208
+	EDP_TX0,
209
+	EDP_TX1,
210
+	HDMI_TX0,
211
+	HDMI_TX1,
212
+	HDMI_RX,
213
+	MAX_DEVICE,
214
+};
215
+
216
+/* SIP_WDT_CONFIG call types  */
217
+enum {
218
+	WDT_START = 0,
219
+	WDT_STOP = 1,
220
+	WDT_PING = 2,
221
+};
222
+
223
+/* SIP_HDMIRX_CONFIG child configs */
224
+enum {
225
+	HDMIRX_AUTO_TOUCH_EN = 0,
226
+	HDMIRX_REG_PRE_FETCH = 1,
227
+	HDMIRX_INFO_NOTIFY = 2,
228
+};
229
+
230
+/* SIP_PVTPLL_CFG child configs */
231
+enum {
232
+	PVTPLL_GET_INFO = 0,
233
+	PVTPLL_ADJUST_TABLE = 1,
234
+	PVTPLL_LOW_TEMP = 2,
235
+};
236
+
237
+struct pt_regs;
238
+typedef void (*sip_fiq_debugger_uart_irq_tf_cb_t)(struct pt_regs *_pt_regs, unsigned long cpu);
155239 
156240 /*
157241  * Rules: struct arm_smccc_res contains result and data, details:
....@@ -159,7 +243,7 @@
159243  * a0: error code(0: success, !0: error);
160244  * a1~a3: data
161245  */
162
-#if IS_ENABLED(CONFIG_ROCKCHIP_SIP)
246
+#if IS_REACHABLE(CONFIG_ROCKCHIP_SIP)
163247 struct arm_smccc_res sip_smc_get_atf_version(void);
164248 struct arm_smccc_res sip_smc_get_sip_version(void);
165249 struct arm_smccc_res sip_smc_dram(u32 arg0, u32 arg1, u32 arg2);
....@@ -177,14 +261,20 @@
177261 int sip_smc_secure_reg_write(u32 addr_phy, u32 val);
178262 u32 sip_smc_secure_reg_read(u32 addr_phy);
179263 struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2);
264
+struct dram_addrmap_info *sip_smc_get_dram_map(void);
180265 int sip_smc_amp_config(u32 sub_func_id, u32 arg1, u32 arg2, u32 arg3);
181266 struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1);
182
-struct dram_addrmap_info *sip_smc_get_dram_map(void);
267
+struct arm_smccc_res sip_smc_get_pvtpll_info(u32 sub_func_id, u32 arg1);
268
+struct arm_smccc_res sip_smc_pvtpll_config(u32 sub_func_id, u32 arg1, u32 arg2,
269
+					   u32 arg3, u32 arg4, u32 arg5, u32 arg6);
183270 
271
+void __iomem *sip_hdcp_request_share_memory(int id);
272
+struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2);
273
+ulong sip_cpu_logical_map_mpidr(u32 cpu);
184274 /***************************fiq debugger **************************************/
185275 void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu);
186276 void sip_fiq_debugger_enable_debug(bool enable);
187
-int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback_fn);
277
+int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, sip_fiq_debugger_uart_irq_tf_cb_t callback_fn);
188278 int sip_fiq_debugger_set_print_port(u32 port_phyaddr, u32 baudrate);
189279 int sip_fiq_debugger_request_share_memory(void);
190280 int sip_fiq_debugger_get_target_cpu(void);
....@@ -192,49 +282,60 @@
192282 int sip_fiq_debugger_sdei_switch_cpu(u32 cur_cpu, u32 target_cpu, u32 flag);
193283 int sip_fiq_debugger_is_enabled(void);
194284 int sip_fiq_debugger_sdei_get_event_id(u32 *fiq, u32 *sw_cpu, u32 *flag);
285
+int sip_fiq_control(u32 sub_func, u32 irq, unsigned long data);
286
+int sip_wdt_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3);
287
+int sip_hdmirx_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3);
288
+int sip_hdcpkey_init(u32 hdcp_id);
289
+int sip_smc_mcu_config(unsigned long mcu_id, unsigned long func, unsigned long arg2);
195290 #else
196291 static inline struct arm_smccc_res sip_smc_get_atf_version(void)
197292 {
198
-	struct arm_smccc_res tmp = {0};
293
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
199294 	return tmp;
200295 }
201296 
202297 static inline struct arm_smccc_res sip_smc_get_sip_version(void)
203298 {
204
-	struct arm_smccc_res tmp = {0};
299
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
205300 	return tmp;
206301 }
207302 
208303 static inline struct arm_smccc_res sip_smc_dram(u32 arg0, u32 arg1, u32 arg2)
209304 {
210
-	struct arm_smccc_res tmp = {0};
305
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
211306 	return tmp;
212307 }
213308 
214309 static inline struct arm_smccc_res sip_smc_request_share_mem
215310 			(u32 page_num, share_page_type_t page_type)
216311 {
217
-	struct arm_smccc_res tmp = {0};
312
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
218313 	return tmp;
219314 }
220315 
221316 static inline struct arm_smccc_res sip_smc_mcu_el3fiq
222317 			(u32 arg0, u32 arg1, u32 arg2)
223318 {
224
-	struct arm_smccc_res tmp = {0};
319
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
225320 	return tmp;
226321 }
227322 
228323 static inline struct arm_smccc_res
229324 sip_smc_vpu_reset(u32 arg0, u32 arg1, u32 arg2)
230325 {
231
-	struct arm_smccc_res tmp = {0};
326
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
327
+	return tmp;
328
+}
329
+
330
+static inline struct arm_smccc_res sip_smc_get_suspend_info(u32 info)
331
+{
332
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
232333 	return tmp;
233334 }
234335 
235336 static inline struct arm_smccc_res sip_smc_lastlog_request(void)
236337 {
237
-	struct arm_smccc_res tmp = {0};
338
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
238339 	return tmp;
239340 }
240341 
....@@ -243,19 +344,17 @@
243344 	return 0;
244345 }
245346 
246
-static inline int sip_smc_get_suspend_info(u32 info)
247
-{
248
-	return 0;
249
-}
250
-
251347 static inline int sip_smc_virtual_poweroff(void) { return 0; }
252348 static inline int sip_smc_remotectl_config(u32 func, u32 data) { return 0; }
253
-static inline u32 sip_smc_secure_reg_read(u32 addr_phy) { return 0; }
254349 static inline int sip_smc_secure_reg_write(u32 addr_phy, u32 val) { return 0; }
255
-static inline int sip_smc_soc_bus_div(u32 arg0, u32 arg1, u32 arg2)
350
+static inline u32 sip_smc_secure_reg_read(u32 addr_phy) { return 0; }
351
+
352
+static inline struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2)
256353 {
257
-	return 0;
354
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
355
+	return tmp;
258356 }
357
+
259358 static inline struct dram_addrmap_info *sip_smc_get_dram_map(void)
260359 {
261360 	return NULL;
....@@ -277,13 +376,45 @@
277376 	return tmp;
278377 }
279378 
379
+static inline struct arm_smccc_res sip_smc_get_pvtpll_info(u32 sub_func_id,
380
+							   u32 arg1)
381
+{
382
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED, };
383
+
384
+	return tmp;
385
+}
386
+
387
+static inline struct arm_smccc_res sip_smc_pvtpll_config(u32 sub_func_id,
388
+							 u32 arg1, u32 arg2,
389
+							 u32 arg3, u32 arg4,
390
+							 u32 arg5, u32 arg6)
391
+{
392
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED, };
393
+
394
+	return tmp;
395
+}
396
+
397
+static inline void __iomem *sip_hdcp_request_share_memory(int id)
398
+{
399
+	return NULL;
400
+}
401
+
402
+static inline struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2)
403
+{
404
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
405
+
406
+	return tmp;
407
+}
408
+
409
+static inline ulong sip_cpu_logical_map_mpidr(u32 cpu) { return 0; }
410
+
280411 /***************************fiq debugger **************************************/
281412 static inline void sip_fiq_debugger_enable_fiq
282413 			(bool enable, uint32_t tgt_cpu) { return; }
283414 
284415 static inline void sip_fiq_debugger_enable_debug(bool enable) { return; }
285416 static inline int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id,
286
-						    void *callback_fn)
417
+						    sip_fiq_debugger_uart_irq_tf_cb_t callback_fn)
287418 {
288419 	return 0;
289420 }
....@@ -300,6 +431,43 @@
300431 static inline int sip_fiq_debugger_sdei_switch_cpu(u32 cur_cpu, u32 target_cpu,
301432 						   u32 flag) { return 0; }
302433 static inline int sip_fiq_debugger_is_enabled(void) { return 0; }
434
+static inline int sip_fiq_debugger_sdei_get_event_id(u32 *fiq, u32 *sw_cpu, u32 *flag)
435
+{
436
+	return SIP_RET_NOT_SUPPORTED;
437
+}
438
+
439
+static inline int sip_fiq_control(u32 sub_func, u32 irq, unsigned long data)
440
+{
441
+	return 0;
442
+}
443
+
444
+static inline int sip_wdt_config(u32 sub_func,
445
+				 u32 arg1,
446
+				 u32 arg2,
447
+				 u32 arg3)
448
+{
449
+	return 0;
450
+}
451
+
452
+static inline int sip_hdmirx_config(u32 sub_func,
453
+				    u32 arg1,
454
+				    u32 arg2,
455
+				    u32 arg3)
456
+{
457
+	return SIP_RET_NOT_SUPPORTED;
458
+}
459
+
460
+static inline int sip_hdcpkey_init(u32 hdcp_id)
461
+{
462
+	return 0;
463
+}
464
+
465
+static inline int sip_smc_mcu_config(unsigned long mcu_id,
466
+				     unsigned long func,
467
+				     unsigned long arg2)
468
+{
469
+	return SIP_RET_NOT_SUPPORTED;
470
+}
303471 #endif
304472 
305473 /* 32-bit OP-TEE context, never change order of members! */