add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/spi/spi-txx9.c
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@@ -26,7 +26,8 @@
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 #include <linux/clk.h>
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 #include <linux/io.h>
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 #include <linux/module.h>
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-#include <linux/gpio.h>
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+#include <linux/gpio/machine.h>
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+#include <linux/gpio/consumer.h>
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 #define SPI_FIFO_SIZE 4
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@@ -79,7 +80,7 @@
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 	void __iomem *membase;
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 	int baseclk;
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 	struct clk *clk;
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-	int last_chipselect;
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+	struct gpio_desc *last_chipselect;
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 	int last_chipselect_val;
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 };
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@@ -95,20 +96,22 @@
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 static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c,
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 		int on, unsigned int cs_delay)
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 {
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-	int val = (spi->mode & SPI_CS_HIGH) ? on : !on;
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-
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+	/*
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+	 * The GPIO descriptor will track polarity inversion inside
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+	 * gpiolib.
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+	 */
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 	if (on) {
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 		/* deselect the chip with cs_change hint in last transfer */
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-		if (c->last_chipselect >= 0)
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-			gpio_set_value(c->last_chipselect,
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+		if (c->last_chipselect)
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+			gpiod_set_value(c->last_chipselect,
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 					!c->last_chipselect_val);
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-		c->last_chipselect = spi->chip_select;
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-		c->last_chipselect_val = val;
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+		c->last_chipselect = spi->cs_gpiod;
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+		c->last_chipselect_val = on;
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 	} else {
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-		c->last_chipselect = -1;
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+		c->last_chipselect = NULL;
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 		ndelay(cs_delay);	/* CS Hold Time */
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 	}
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-	gpio_set_value(spi->chip_select, val);
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+	gpiod_set_value(spi->cs_gpiod, on);
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 	ndelay(cs_delay);	/* CS Setup Time / CS Recovery Time */
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 }
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@@ -118,12 +121,6 @@
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 	if (!spi->max_speed_hz)
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 		return -EINVAL;
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-
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-	if (gpio_direction_output(spi->chip_select,
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-			!(spi->mode & SPI_CS_HIGH))) {
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-		dev_err(&spi->dev, "Cannot setup GPIO for chipselect.\n");
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-		return -EINVAL;
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-	}
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 	/* deselect chip */
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 	spin_lock(&c->lock);
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@@ -248,8 +245,7 @@
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 			len -= count * wsize;
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 		}
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 		m->actual_length += t->len;
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-		if (t->delay_usecs)
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-			udelay(t->delay_usecs);
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+		spi_transfer_delay_exec(t);
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 		if (!cs_change)
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 			continue;
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@@ -320,6 +316,47 @@
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 	return 0;
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 }
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+/*
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+ * Chip select uses GPIO only, further the driver is using the chip select
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+ * numer (from the device tree "reg" property, and this can only come from
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+ * device tree since this i MIPS and there is no way to pass platform data) as
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+ * the GPIO number. As the platform has only one GPIO controller (the txx9 GPIO
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+ * chip) it is thus using the chip select number as an offset into that chip.
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+ * This chip has a maximum of 16 GPIOs 0..15 and this is what all platforms
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+ * register.
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+ *
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+ * We modernized this behaviour by explicitly converting that offset to an
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+ * offset on the GPIO chip using a GPIO descriptor machine table of the same
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+ * size as the txx9 GPIO chip with a 1-to-1 mapping of chip select to GPIO
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+ * offset.
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+ *
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+ * This is admittedly a hack, but it is countering the hack of using "reg" to
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+ * contain a GPIO offset when it should be using "cs-gpios" as the SPI bindings
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+ * state.
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+ */
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+static struct gpiod_lookup_table txx9spi_cs_gpio_table = {
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+	.dev_id = "spi0",
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+	.table = {
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+		GPIO_LOOKUP_IDX("TXx9", 0, "cs", 0, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 1, "cs", 1, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 2, "cs", 2, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 3, "cs", 3, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 4, "cs", 4, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 5, "cs", 5, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 6, "cs", 6, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 7, "cs", 7, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 8, "cs", 8, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 9, "cs", 9, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 10, "cs", 10, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 11, "cs", 11, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 12, "cs", 12, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 13, "cs", 13, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 14, "cs", 14, GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP_IDX("TXx9", 15, "cs", 15, GPIO_ACTIVE_LOW),
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+		{ },
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+	},
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+};
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+
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 static int txx9spi_probe(struct platform_device *dev)
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 {
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 	struct spi_master *master;
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@@ -373,11 +410,13 @@
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 	if (ret)
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 		goto exit;
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-	c->last_chipselect = -1;
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+	c->last_chipselect = NULL;
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 	dev_info(&dev->dev, "at %#llx, irq %d, %dMHz\n",
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 		 (unsigned long long)res->start, irq,
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 		 (c->baseclk + 500000) / 1000000);
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+
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+	gpiod_add_lookup_table(&txx9spi_cs_gpio_table);
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 	/* the spi->mode bits understood by this driver: */
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 	master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA;
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@@ -387,6 +426,7 @@
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 	master->transfer = txx9spi_transfer;
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 	master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */
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 	master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
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+	master->use_gpio_descriptors = true;
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 	ret = devm_spi_register_master(&dev->dev, master);
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 	if (ret)