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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/drivers/spi/spi-qup.c
....@@ -1,14 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (c) 2008-2014, The Linux foundation. All rights reserved.
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License rev 2 and
6
- * only rev 2 as published by the free Software foundation.
7
- *
8
- * This program is distributed in the hope that it will be useful,
9
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
- * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE.  See the
11
- * GNU General Public License for more details.
124  */
135 
146 #include <linux/clk.h>
....@@ -281,6 +273,9 @@
281273 		writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
282274 			       controller->base + QUP_OPERATIONAL);
283275 
276
+		if (!remainder)
277
+			goto exit;
278
+
284279 		if (is_block_mode) {
285280 			num_words = (remainder > words_per_block) ?
286281 					words_per_block : remainder;
....@@ -310,11 +305,13 @@
310305 	 * to refresh opflags value because MAX_INPUT_DONE_FLAG may now be
311306 	 * present and this is used to determine if transaction is complete
312307 	 */
313
-	*opflags = readl_relaxed(controller->base + QUP_OPERATIONAL);
314
-	if (is_block_mode && *opflags & QUP_OP_MAX_INPUT_DONE_FLAG)
315
-		writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
316
-			       controller->base + QUP_OPERATIONAL);
317
-
308
+exit:
309
+	if (!remainder) {
310
+		*opflags = readl_relaxed(controller->base + QUP_OPERATIONAL);
311
+		if (is_block_mode && *opflags & QUP_OP_MAX_INPUT_DONE_FLAG)
312
+			writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
313
+				       controller->base + QUP_OPERATIONAL);
314
+	}
318315 }
319316 
320317 static void spi_qup_write_to_fifo(struct spi_qup *controller, u32 num_words)
....@@ -361,6 +358,10 @@
361358 		/* ACK by clearing service flag */
362359 		writel_relaxed(QUP_OP_OUT_SERVICE_FLAG,
363360 			       controller->base + QUP_OPERATIONAL);
361
+
362
+		/* make sure the interrupt is valid */
363
+		if (!remainder)
364
+			return;
364365 
365366 		if (is_block_mode) {
366367 			num_words = (remainder > words_per_block) ?
....@@ -575,10 +576,24 @@
575576 	return 0;
576577 }
577578 
579
+static bool spi_qup_data_pending(struct spi_qup *controller)
580
+{
581
+	unsigned int remainder_tx, remainder_rx;
582
+
583
+	remainder_tx = DIV_ROUND_UP(spi_qup_len(controller) -
584
+				    controller->tx_bytes, controller->w_size);
585
+
586
+	remainder_rx = DIV_ROUND_UP(spi_qup_len(controller) -
587
+				    controller->rx_bytes, controller->w_size);
588
+
589
+	return remainder_tx || remainder_rx;
590
+}
591
+
578592 static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
579593 {
580594 	struct spi_qup *controller = dev_id;
581595 	u32 opflags, qup_err, spi_err;
596
+	unsigned long flags;
582597 	int error = 0;
583598 
584599 	qup_err = readl_relaxed(controller->base + QUP_ERROR_FLAGS);
....@@ -610,6 +625,11 @@
610625 		error = -EIO;
611626 	}
612627 
628
+	spin_lock_irqsave(&controller->lock, flags);
629
+	if (!controller->error)
630
+		controller->error = error;
631
+	spin_unlock_irqrestore(&controller->lock, flags);
632
+
613633 	if (spi_qup_is_dma_xfer(controller->mode)) {
614634 		writel_relaxed(opflags, controller->base + QUP_OPERATIONAL);
615635 	} else {
....@@ -618,10 +638,21 @@
618638 
619639 		if (opflags & QUP_OP_OUT_SERVICE_FLAG)
620640 			spi_qup_write(controller);
641
+
642
+		if (!spi_qup_data_pending(controller))
643
+			complete(&controller->done);
621644 	}
622645 
623
-	if ((opflags & QUP_OP_MAX_INPUT_DONE_FLAG) || error)
646
+	if (error)
624647 		complete(&controller->done);
648
+
649
+	if (opflags & QUP_OP_MAX_INPUT_DONE_FLAG) {
650
+		if (!spi_qup_is_dma_xfer(controller->mode)) {
651
+			if (spi_qup_data_pending(controller))
652
+				return IRQ_HANDLED;
653
+		}
654
+		complete(&controller->done);
655
+	}
625656 
626657 	return IRQ_HANDLED;
627658 }
....@@ -817,7 +848,7 @@
817848 {
818849 	struct spi_qup *controller = spi_master_get_devdata(master);
819850 	unsigned long timeout, flags;
820
-	int ret = -EIO;
851
+	int ret;
821852 
822853 	ret = spi_qup_io_prep(spi, xfer);
823854 	if (ret)
....@@ -842,10 +873,6 @@
842873 	else
843874 		ret = spi_qup_do_pio(spi, xfer, timeout);
844875 
845
-	if (ret)
846
-		goto exit;
847
-
848
-exit:
849876 	spi_qup_set_state(controller, QUP_STATE_RESET);
850877 	spin_lock_irqsave(&controller->lock, flags);
851878 	if (!ret)
....@@ -905,11 +932,11 @@
905932 	int ret;
906933 
907934 	/* allocate dma resources, if available */
908
-	master->dma_rx = dma_request_slave_channel_reason(dev, "rx");
935
+	master->dma_rx = dma_request_chan(dev, "rx");
909936 	if (IS_ERR(master->dma_rx))
910937 		return PTR_ERR(master->dma_rx);
911938 
912
-	master->dma_tx = dma_request_slave_channel_reason(dev, "tx");
939
+	master->dma_tx = dma_request_chan(dev, "tx");
913940 	if (IS_ERR(master->dma_tx)) {
914941 		ret = PTR_ERR(master->dma_tx);
915942 		goto err_tx;
....@@ -1003,23 +1030,8 @@
10031030 		return -ENXIO;
10041031 	}
10051032 
1006
-	ret = clk_prepare_enable(cclk);
1007
-	if (ret) {
1008
-		dev_err(dev, "cannot enable core clock\n");
1009
-		return ret;
1010
-	}
1011
-
1012
-	ret = clk_prepare_enable(iclk);
1013
-	if (ret) {
1014
-		clk_disable_unprepare(cclk);
1015
-		dev_err(dev, "cannot enable iface clock\n");
1016
-		return ret;
1017
-	}
1018
-
10191033 	master = spi_alloc_master(dev, sizeof(struct spi_qup));
10201034 	if (!master) {
1021
-		clk_disable_unprepare(cclk);
1022
-		clk_disable_unprepare(iclk);
10231035 		dev_err(dev, "cannot allocate master\n");
10241036 		return -ENOMEM;
10251037 	}
....@@ -1065,6 +1077,19 @@
10651077 	spin_lock_init(&controller->lock);
10661078 	init_completion(&controller->done);
10671079 
1080
+	ret = clk_prepare_enable(cclk);
1081
+	if (ret) {
1082
+		dev_err(dev, "cannot enable core clock\n");
1083
+		goto error_dma;
1084
+	}
1085
+
1086
+	ret = clk_prepare_enable(iclk);
1087
+	if (ret) {
1088
+		clk_disable_unprepare(cclk);
1089
+		dev_err(dev, "cannot enable iface clock\n");
1090
+		goto error_dma;
1091
+	}
1092
+
10681093 	iomode = readl_relaxed(base + QUP_IO_M_MODES);
10691094 
10701095 	size = QUP_IO_M_OUTPUT_BLOCK_SIZE(iomode);
....@@ -1094,7 +1119,7 @@
10941119 	ret = spi_qup_set_state(controller, QUP_STATE_RESET);
10951120 	if (ret) {
10961121 		dev_err(dev, "cannot set RESET state\n");
1097
-		goto error_dma;
1122
+		goto error_clk;
10981123 	}
10991124 
11001125 	writel_relaxed(0, base + QUP_OPERATIONAL);
....@@ -1118,7 +1143,7 @@
11181143 	ret = devm_request_irq(dev, irq, spi_qup_qup_irq,
11191144 			       IRQF_TRIGGER_HIGH, pdev->name, controller);
11201145 	if (ret)
1121
-		goto error_dma;
1146
+		goto error_clk;
11221147 
11231148 	pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
11241149 	pm_runtime_use_autosuspend(dev);
....@@ -1133,11 +1158,12 @@
11331158 
11341159 disable_pm:
11351160 	pm_runtime_disable(&pdev->dev);
1161
+error_clk:
1162
+	clk_disable_unprepare(cclk);
1163
+	clk_disable_unprepare(iclk);
11361164 error_dma:
11371165 	spi_qup_release_dma(master);
11381166 error:
1139
-	clk_disable_unprepare(cclk);
1140
-	clk_disable_unprepare(iclk);
11411167 	spi_master_put(master);
11421168 	return ret;
11431169 }
....@@ -1172,8 +1198,10 @@
11721198 		return ret;
11731199 
11741200 	ret = clk_prepare_enable(controller->cclk);
1175
-	if (ret)
1201
+	if (ret) {
1202
+		clk_disable_unprepare(controller->iclk);
11761203 		return ret;
1204
+	}
11771205 
11781206 	/* Disable clocks auto gaiting */
11791207 	config = readl_relaxed(controller->base + QUP_CONFIG);
....@@ -1219,14 +1247,25 @@
12191247 		return ret;
12201248 
12211249 	ret = clk_prepare_enable(controller->cclk);
1222
-	if (ret)
1250
+	if (ret) {
1251
+		clk_disable_unprepare(controller->iclk);
12231252 		return ret;
1253
+	}
12241254 
12251255 	ret = spi_qup_set_state(controller, QUP_STATE_RESET);
12261256 	if (ret)
1227
-		return ret;
1257
+		goto disable_clk;
12281258 
1229
-	return spi_master_resume(master);
1259
+	ret = spi_master_resume(master);
1260
+	if (ret)
1261
+		goto disable_clk;
1262
+
1263
+	return 0;
1264
+
1265
+disable_clk:
1266
+	clk_disable_unprepare(controller->cclk);
1267
+	clk_disable_unprepare(controller->iclk);
1268
+	return ret;
12301269 }
12311270 #endif /* CONFIG_PM_SLEEP */
12321271 
....@@ -1237,17 +1276,21 @@
12371276 	int ret;
12381277 
12391278 	ret = pm_runtime_get_sync(&pdev->dev);
1240
-	if (ret < 0)
1241
-		return ret;
12421279 
1243
-	ret = spi_qup_set_state(controller, QUP_STATE_RESET);
1244
-	if (ret)
1245
-		return ret;
1280
+	if (ret >= 0) {
1281
+		ret = spi_qup_set_state(controller, QUP_STATE_RESET);
1282
+		if (ret)
1283
+			dev_warn(&pdev->dev, "failed to reset controller (%pe)\n",
1284
+				 ERR_PTR(ret));
1285
+
1286
+		clk_disable_unprepare(controller->cclk);
1287
+		clk_disable_unprepare(controller->iclk);
1288
+	} else {
1289
+		dev_warn(&pdev->dev, "failed to resume, skip hw disable (%pe)\n",
1290
+			 ERR_PTR(ret));
1291
+	}
12461292 
12471293 	spi_qup_release_dma(master);
1248
-
1249
-	clk_disable_unprepare(controller->cclk);
1250
-	clk_disable_unprepare(controller->iclk);
12511294 
12521295 	pm_runtime_put_noidle(&pdev->dev);
12531296 	pm_runtime_disable(&pdev->dev);