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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Microchip PIC32 SPI controller driver. |
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3 | 4 | * |
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4 | 5 | * Purna Chandra Mandal <purna.mandal@microchip.com> |
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5 | 6 | * Copyright (c) 2016, Microchip Technology Inc. |
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6 | | - * |
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7 | | - * This program is free software; you can distribute it and/or modify it |
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8 | | - * under the terms of the GNU General Public License (Version 2) as |
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9 | | - * published by the Free Software Foundation. |
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10 | | - * |
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11 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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12 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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13 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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14 | | - * for more details. |
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15 | 7 | */ |
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16 | 8 | |
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17 | 9 | #include <linux/clk.h> |
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.. | .. |
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560 | 552 | dev_err(&spi->dev, "wait error/timedout\n"); |
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561 | 553 | if (dma_issued) { |
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562 | 554 | dmaengine_terminate_all(master->dma_rx); |
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563 | | - dmaengine_terminate_all(master->dma_rx); |
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| 555 | + dmaengine_terminate_all(master->dma_tx); |
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564 | 556 | } |
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565 | 557 | ret = -ETIMEDOUT; |
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566 | 558 | } else { |
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.. | .. |
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615 | 607 | gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
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616 | 608 | } |
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617 | 609 | |
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618 | | -static void pic32_spi_dma_prep(struct pic32_spi *pic32s, struct device *dev) |
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| 610 | +static int pic32_spi_dma_prep(struct pic32_spi *pic32s, struct device *dev) |
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619 | 611 | { |
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620 | 612 | struct spi_master *master = pic32s->master; |
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621 | | - dma_cap_mask_t mask; |
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| 613 | + int ret = 0; |
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622 | 614 | |
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623 | | - dma_cap_zero(mask); |
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624 | | - dma_cap_set(DMA_SLAVE, mask); |
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| 615 | + master->dma_rx = dma_request_chan(dev, "spi-rx"); |
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| 616 | + if (IS_ERR(master->dma_rx)) { |
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| 617 | + if (PTR_ERR(master->dma_rx) == -EPROBE_DEFER) |
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| 618 | + ret = -EPROBE_DEFER; |
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| 619 | + else |
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| 620 | + dev_warn(dev, "RX channel not found.\n"); |
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625 | 621 | |
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626 | | - master->dma_rx = dma_request_slave_channel_compat(mask, NULL, NULL, |
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627 | | - dev, "spi-rx"); |
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628 | | - if (!master->dma_rx) { |
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629 | | - dev_warn(dev, "RX channel not found.\n"); |
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| 622 | + master->dma_rx = NULL; |
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630 | 623 | goto out_err; |
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631 | 624 | } |
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632 | 625 | |
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633 | | - master->dma_tx = dma_request_slave_channel_compat(mask, NULL, NULL, |
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634 | | - dev, "spi-tx"); |
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635 | | - if (!master->dma_tx) { |
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636 | | - dev_warn(dev, "TX channel not found.\n"); |
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| 626 | + master->dma_tx = dma_request_chan(dev, "spi-tx"); |
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| 627 | + if (IS_ERR(master->dma_tx)) { |
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| 628 | + if (PTR_ERR(master->dma_tx) == -EPROBE_DEFER) |
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| 629 | + ret = -EPROBE_DEFER; |
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| 630 | + else |
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| 631 | + dev_warn(dev, "TX channel not found.\n"); |
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| 632 | + |
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| 633 | + master->dma_tx = NULL; |
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637 | 634 | goto out_err; |
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638 | 635 | } |
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639 | 636 | |
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.. | .. |
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643 | 640 | /* DMA chnls allocated and prepared */ |
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644 | 641 | set_bit(PIC32F_DMA_PREP, &pic32s->flags); |
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645 | 642 | |
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646 | | - return; |
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| 643 | + return 0; |
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647 | 644 | |
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648 | 645 | out_err: |
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649 | | - if (master->dma_rx) |
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| 646 | + if (master->dma_rx) { |
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650 | 647 | dma_release_channel(master->dma_rx); |
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| 648 | + master->dma_rx = NULL; |
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| 649 | + } |
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651 | 650 | |
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652 | | - if (master->dma_tx) |
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| 651 | + if (master->dma_tx) { |
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653 | 652 | dma_release_channel(master->dma_tx); |
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| 653 | + master->dma_tx = NULL; |
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| 654 | + } |
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| 655 | + |
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| 656 | + return ret; |
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654 | 657 | } |
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655 | 658 | |
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656 | 659 | static void pic32_spi_dma_unprep(struct pic32_spi *pic32s) |
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.. | .. |
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720 | 723 | |
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721 | 724 | /* get irq resources: err-irq, rx-irq, tx-irq */ |
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722 | 725 | pic32s->fault_irq = platform_get_irq_byname(pdev, "fault"); |
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723 | | - if (pic32s->fault_irq < 0) { |
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724 | | - dev_err(&pdev->dev, "fault-irq not found\n"); |
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| 726 | + if (pic32s->fault_irq < 0) |
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725 | 727 | return pic32s->fault_irq; |
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726 | | - } |
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727 | 728 | |
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728 | 729 | pic32s->rx_irq = platform_get_irq_byname(pdev, "rx"); |
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729 | | - if (pic32s->rx_irq < 0) { |
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730 | | - dev_err(&pdev->dev, "rx-irq not found\n"); |
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| 730 | + if (pic32s->rx_irq < 0) |
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731 | 731 | return pic32s->rx_irq; |
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732 | | - } |
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733 | 732 | |
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734 | 733 | pic32s->tx_irq = platform_get_irq_byname(pdev, "tx"); |
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735 | | - if (pic32s->tx_irq < 0) { |
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736 | | - dev_err(&pdev->dev, "tx-irq not found\n"); |
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| 734 | + if (pic32s->tx_irq < 0) |
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737 | 735 | return pic32s->tx_irq; |
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738 | | - } |
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739 | 736 | |
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740 | 737 | /* get clock */ |
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741 | 738 | pic32s->clk = devm_clk_get(&pdev->dev, "mck0"); |
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.. | .. |
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775 | 772 | if (ret) |
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776 | 773 | goto err_master; |
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777 | 774 | |
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778 | | - master->dev.of_node = of_node_get(pdev->dev.of_node); |
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| 775 | + master->dev.of_node = pdev->dev.of_node; |
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779 | 776 | master->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_CS_HIGH; |
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780 | 777 | master->num_chipselect = 1; /* single chip-select */ |
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781 | 778 | master->max_speed_hz = clk_get_rate(pic32s->clk); |
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.. | .. |
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791 | 788 | master->unprepare_transfer_hardware = pic32_spi_unprepare_hardware; |
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792 | 789 | |
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793 | 790 | /* optional DMA support */ |
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794 | | - pic32_spi_dma_prep(pic32s, &pdev->dev); |
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| 791 | + ret = pic32_spi_dma_prep(pic32s, &pdev->dev); |
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| 792 | + if (ret) |
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| 793 | + goto err_bailout; |
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| 794 | + |
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795 | 795 | if (test_bit(PIC32F_DMA_PREP, &pic32s->flags)) |
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796 | 796 | master->can_dma = pic32_spi_can_dma; |
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797 | 797 | |
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