.. | .. |
---|
9 | 9 | * |
---|
10 | 10 | * Copyright (C) 2013 Tuomas Vainikka (tuomas.vainikka@aalto.fi) for |
---|
11 | 11 | * Blizzard 1230 DMA and probe function fixes |
---|
12 | | - * |
---|
13 | | - * Copyright (C) 2017 Finn Thain for PIO code from Mac ESP driver adapted here |
---|
14 | 12 | */ |
---|
15 | 13 | /* |
---|
16 | 14 | * ZORRO bus code from: |
---|
.. | .. |
---|
36 | 34 | #include <linux/delay.h> |
---|
37 | 35 | #include <linux/zorro.h> |
---|
38 | 36 | #include <linux/slab.h> |
---|
| 37 | +#include <linux/pgtable.h> |
---|
39 | 38 | |
---|
40 | 39 | #include <asm/page.h> |
---|
41 | | -#include <asm/pgtable.h> |
---|
42 | 40 | #include <asm/cacheflush.h> |
---|
43 | 41 | #include <asm/amigahw.h> |
---|
44 | 42 | #include <asm/amigaints.h> |
---|
.. | .. |
---|
159 | 157 | struct zorro_esp_priv { |
---|
160 | 158 | struct esp *esp; /* our ESP instance - for Scsi_host* */ |
---|
161 | 159 | void __iomem *board_base; /* virtual address (Zorro III board) */ |
---|
162 | | - int error; /* PIO error flag */ |
---|
163 | 160 | int zorro3; /* board is Zorro III */ |
---|
164 | 161 | unsigned char ctrl_data; /* shadow copy of ctrl_reg */ |
---|
165 | 162 | }; |
---|
.. | .. |
---|
180 | 177 | static u8 zorro_esp_read8(struct esp *esp, unsigned long reg) |
---|
181 | 178 | { |
---|
182 | 179 | return readb(esp->regs + (reg * 4UL)); |
---|
183 | | -} |
---|
184 | | - |
---|
185 | | -static dma_addr_t zorro_esp_map_single(struct esp *esp, void *buf, |
---|
186 | | - size_t sz, int dir) |
---|
187 | | -{ |
---|
188 | | - return dma_map_single(esp->dev, buf, sz, dir); |
---|
189 | | -} |
---|
190 | | - |
---|
191 | | -static int zorro_esp_map_sg(struct esp *esp, struct scatterlist *sg, |
---|
192 | | - int num_sg, int dir) |
---|
193 | | -{ |
---|
194 | | - return dma_map_sg(esp->dev, sg, num_sg, dir); |
---|
195 | | -} |
---|
196 | | - |
---|
197 | | -static void zorro_esp_unmap_single(struct esp *esp, dma_addr_t addr, |
---|
198 | | - size_t sz, int dir) |
---|
199 | | -{ |
---|
200 | | - dma_unmap_single(esp->dev, addr, sz, dir); |
---|
201 | | -} |
---|
202 | | - |
---|
203 | | -static void zorro_esp_unmap_sg(struct esp *esp, struct scatterlist *sg, |
---|
204 | | - int num_sg, int dir) |
---|
205 | | -{ |
---|
206 | | - dma_unmap_sg(esp->dev, sg, num_sg, dir); |
---|
207 | 180 | } |
---|
208 | 181 | |
---|
209 | 182 | static int zorro_esp_irq_pending(struct esp *esp) |
---|
.. | .. |
---|
281 | 254 | z_writel(0, zep->board_base); |
---|
282 | 255 | } |
---|
283 | 256 | |
---|
284 | | -/* |
---|
285 | | - * Programmed IO routines follow. |
---|
286 | | - */ |
---|
287 | | - |
---|
288 | | -static inline unsigned int zorro_esp_wait_for_fifo(struct esp *esp) |
---|
289 | | -{ |
---|
290 | | - int i = 500000; |
---|
291 | | - |
---|
292 | | - do { |
---|
293 | | - unsigned int fbytes = zorro_esp_read8(esp, ESP_FFLAGS) |
---|
294 | | - & ESP_FF_FBYTES; |
---|
295 | | - |
---|
296 | | - if (fbytes) |
---|
297 | | - return fbytes; |
---|
298 | | - |
---|
299 | | - udelay(2); |
---|
300 | | - } while (--i); |
---|
301 | | - |
---|
302 | | - pr_err("FIFO is empty (sreg %02x)\n", |
---|
303 | | - zorro_esp_read8(esp, ESP_STATUS)); |
---|
304 | | - return 0; |
---|
305 | | -} |
---|
306 | | - |
---|
307 | | -static inline int zorro_esp_wait_for_intr(struct esp *esp) |
---|
308 | | -{ |
---|
309 | | - struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev); |
---|
310 | | - int i = 500000; |
---|
311 | | - |
---|
312 | | - do { |
---|
313 | | - esp->sreg = zorro_esp_read8(esp, ESP_STATUS); |
---|
314 | | - if (esp->sreg & ESP_STAT_INTR) |
---|
315 | | - return 0; |
---|
316 | | - |
---|
317 | | - udelay(2); |
---|
318 | | - } while (--i); |
---|
319 | | - |
---|
320 | | - pr_err("IRQ timeout (sreg %02x)\n", esp->sreg); |
---|
321 | | - zep->error = 1; |
---|
322 | | - return 1; |
---|
323 | | -} |
---|
324 | | - |
---|
325 | | -/* |
---|
326 | | - * PIO macros as used in mac_esp.c. |
---|
327 | | - * Note that addr and fifo arguments are local-scope variables declared |
---|
328 | | - * in zorro_esp_send_pio_cmd(), the macros are only used in that function, |
---|
329 | | - * and addr and fifo are referenced in each use of the macros so there |
---|
330 | | - * is no need to pass them as macro parameters. |
---|
331 | | - */ |
---|
332 | | -#define ZORRO_ESP_PIO_LOOP(operands, reg1) \ |
---|
333 | | - asm volatile ( \ |
---|
334 | | - "1: moveb " operands "\n" \ |
---|
335 | | - " subqw #1,%1 \n" \ |
---|
336 | | - " jbne 1b \n" \ |
---|
337 | | - : "+a" (addr), "+r" (reg1) \ |
---|
338 | | - : "a" (fifo)); |
---|
339 | | - |
---|
340 | | -#define ZORRO_ESP_PIO_FILL(operands, reg1) \ |
---|
341 | | - asm volatile ( \ |
---|
342 | | - " moveb " operands "\n" \ |
---|
343 | | - " moveb " operands "\n" \ |
---|
344 | | - " moveb " operands "\n" \ |
---|
345 | | - " moveb " operands "\n" \ |
---|
346 | | - " moveb " operands "\n" \ |
---|
347 | | - " moveb " operands "\n" \ |
---|
348 | | - " moveb " operands "\n" \ |
---|
349 | | - " moveb " operands "\n" \ |
---|
350 | | - " moveb " operands "\n" \ |
---|
351 | | - " moveb " operands "\n" \ |
---|
352 | | - " moveb " operands "\n" \ |
---|
353 | | - " moveb " operands "\n" \ |
---|
354 | | - " moveb " operands "\n" \ |
---|
355 | | - " moveb " operands "\n" \ |
---|
356 | | - " moveb " operands "\n" \ |
---|
357 | | - " moveb " operands "\n" \ |
---|
358 | | - " subqw #8,%1 \n" \ |
---|
359 | | - " subqw #8,%1 \n" \ |
---|
360 | | - : "+a" (addr), "+r" (reg1) \ |
---|
361 | | - : "a" (fifo)); |
---|
362 | | - |
---|
363 | | -#define ZORRO_ESP_FIFO_SIZE 16 |
---|
364 | | - |
---|
365 | | -static void zorro_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count, |
---|
366 | | - u32 dma_count, int write, u8 cmd) |
---|
367 | | -{ |
---|
368 | | - struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev); |
---|
369 | | - u8 __iomem *fifo = esp->regs + ESP_FDATA * 16; |
---|
370 | | - u8 phase = esp->sreg & ESP_STAT_PMASK; |
---|
371 | | - |
---|
372 | | - cmd &= ~ESP_CMD_DMA; |
---|
373 | | - |
---|
374 | | - if (write) { |
---|
375 | | - u8 *dst = (u8 *)addr; |
---|
376 | | - u8 mask = ~(phase == ESP_MIP ? ESP_INTR_FDONE : ESP_INTR_BSERV); |
---|
377 | | - |
---|
378 | | - scsi_esp_cmd(esp, cmd); |
---|
379 | | - |
---|
380 | | - while (1) { |
---|
381 | | - if (!zorro_esp_wait_for_fifo(esp)) |
---|
382 | | - break; |
---|
383 | | - |
---|
384 | | - *dst++ = zorro_esp_read8(esp, ESP_FDATA); |
---|
385 | | - --esp_count; |
---|
386 | | - |
---|
387 | | - if (!esp_count) |
---|
388 | | - break; |
---|
389 | | - |
---|
390 | | - if (zorro_esp_wait_for_intr(esp)) |
---|
391 | | - break; |
---|
392 | | - |
---|
393 | | - if ((esp->sreg & ESP_STAT_PMASK) != phase) |
---|
394 | | - break; |
---|
395 | | - |
---|
396 | | - esp->ireg = zorro_esp_read8(esp, ESP_INTRPT); |
---|
397 | | - if (esp->ireg & mask) { |
---|
398 | | - zep->error = 1; |
---|
399 | | - break; |
---|
400 | | - } |
---|
401 | | - |
---|
402 | | - if (phase == ESP_MIP) |
---|
403 | | - scsi_esp_cmd(esp, ESP_CMD_MOK); |
---|
404 | | - |
---|
405 | | - scsi_esp_cmd(esp, ESP_CMD_TI); |
---|
406 | | - } |
---|
407 | | - } else { /* unused, as long as we only handle MIP here */ |
---|
408 | | - scsi_esp_cmd(esp, ESP_CMD_FLUSH); |
---|
409 | | - |
---|
410 | | - if (esp_count >= ZORRO_ESP_FIFO_SIZE) |
---|
411 | | - ZORRO_ESP_PIO_FILL("%0@+,%2@", esp_count) |
---|
412 | | - else |
---|
413 | | - ZORRO_ESP_PIO_LOOP("%0@+,%2@", esp_count) |
---|
414 | | - |
---|
415 | | - scsi_esp_cmd(esp, cmd); |
---|
416 | | - |
---|
417 | | - while (esp_count) { |
---|
418 | | - unsigned int n; |
---|
419 | | - |
---|
420 | | - if (zorro_esp_wait_for_intr(esp)) |
---|
421 | | - break; |
---|
422 | | - |
---|
423 | | - if ((esp->sreg & ESP_STAT_PMASK) != phase) |
---|
424 | | - break; |
---|
425 | | - |
---|
426 | | - esp->ireg = zorro_esp_read8(esp, ESP_INTRPT); |
---|
427 | | - if (esp->ireg & ~ESP_INTR_BSERV) { |
---|
428 | | - zep->error = 1; |
---|
429 | | - break; |
---|
430 | | - } |
---|
431 | | - |
---|
432 | | - n = ZORRO_ESP_FIFO_SIZE - |
---|
433 | | - (zorro_esp_read8(esp, ESP_FFLAGS) & ESP_FF_FBYTES); |
---|
434 | | - if (n > esp_count) |
---|
435 | | - n = esp_count; |
---|
436 | | - |
---|
437 | | - if (n == ZORRO_ESP_FIFO_SIZE) |
---|
438 | | - ZORRO_ESP_PIO_FILL("%0@+,%2@", esp_count) |
---|
439 | | - else { |
---|
440 | | - esp_count -= n; |
---|
441 | | - ZORRO_ESP_PIO_LOOP("%0@+,%2@", n) |
---|
442 | | - } |
---|
443 | | - |
---|
444 | | - scsi_esp_cmd(esp, ESP_CMD_TI); |
---|
445 | | - } |
---|
446 | | - } |
---|
447 | | -} |
---|
448 | | - |
---|
449 | 257 | /* Blizzard 1230/60 SCSI-IV DMA */ |
---|
450 | 258 | |
---|
451 | 259 | static void zorro_esp_send_blz1230_dma_cmd(struct esp *esp, u32 addr, |
---|
452 | 260 | u32 esp_count, u32 dma_count, int write, u8 cmd) |
---|
453 | 261 | { |
---|
454 | | - struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev); |
---|
455 | 262 | struct blz1230_dma_registers __iomem *dregs = esp->dma_regs; |
---|
456 | 263 | u8 phase = esp->sreg & ESP_STAT_PMASK; |
---|
457 | 264 | |
---|
458 | | - zep->error = 0; |
---|
459 | 265 | /* |
---|
460 | 266 | * Use PIO if transferring message bytes to esp->command_block_dma. |
---|
461 | 267 | * PIO requires a virtual address, so substitute esp->command_block |
---|
462 | 268 | * for addr. |
---|
463 | 269 | */ |
---|
464 | 270 | if (phase == ESP_MIP && addr == esp->command_block_dma) { |
---|
465 | | - zorro_esp_send_pio_cmd(esp, (u32) esp->command_block, |
---|
466 | | - esp_count, dma_count, write, cmd); |
---|
| 271 | + esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count, |
---|
| 272 | + dma_count, write, cmd); |
---|
467 | 273 | return; |
---|
468 | 274 | } |
---|
| 275 | + |
---|
| 276 | + /* Clear the results of a possible prior esp->ops->send_dma_cmd() */ |
---|
| 277 | + esp->send_cmd_error = 0; |
---|
| 278 | + esp->send_cmd_residual = 0; |
---|
469 | 279 | |
---|
470 | 280 | if (write) |
---|
471 | 281 | /* DMA receive */ |
---|
.. | .. |
---|
500 | 310 | static void zorro_esp_send_blz1230II_dma_cmd(struct esp *esp, u32 addr, |
---|
501 | 311 | u32 esp_count, u32 dma_count, int write, u8 cmd) |
---|
502 | 312 | { |
---|
503 | | - struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev); |
---|
504 | 313 | struct blz1230II_dma_registers __iomem *dregs = esp->dma_regs; |
---|
505 | 314 | u8 phase = esp->sreg & ESP_STAT_PMASK; |
---|
506 | 315 | |
---|
507 | | - zep->error = 0; |
---|
508 | 316 | /* Use PIO if transferring message bytes to esp->command_block_dma */ |
---|
509 | 317 | if (phase == ESP_MIP && addr == esp->command_block_dma) { |
---|
510 | | - zorro_esp_send_pio_cmd(esp, (u32) esp->command_block, |
---|
511 | | - esp_count, dma_count, write, cmd); |
---|
| 318 | + esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count, |
---|
| 319 | + dma_count, write, cmd); |
---|
512 | 320 | return; |
---|
513 | 321 | } |
---|
| 322 | + |
---|
| 323 | + esp->send_cmd_error = 0; |
---|
| 324 | + esp->send_cmd_residual = 0; |
---|
514 | 325 | |
---|
515 | 326 | if (write) |
---|
516 | 327 | /* DMA receive */ |
---|
.. | .. |
---|
544 | 355 | static void zorro_esp_send_blz2060_dma_cmd(struct esp *esp, u32 addr, |
---|
545 | 356 | u32 esp_count, u32 dma_count, int write, u8 cmd) |
---|
546 | 357 | { |
---|
547 | | - struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev); |
---|
548 | 358 | struct blz2060_dma_registers __iomem *dregs = esp->dma_regs; |
---|
549 | 359 | u8 phase = esp->sreg & ESP_STAT_PMASK; |
---|
550 | 360 | |
---|
551 | | - zep->error = 0; |
---|
552 | 361 | /* Use PIO if transferring message bytes to esp->command_block_dma */ |
---|
553 | 362 | if (phase == ESP_MIP && addr == esp->command_block_dma) { |
---|
554 | | - zorro_esp_send_pio_cmd(esp, (u32) esp->command_block, |
---|
555 | | - esp_count, dma_count, write, cmd); |
---|
| 363 | + esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count, |
---|
| 364 | + dma_count, write, cmd); |
---|
556 | 365 | return; |
---|
557 | 366 | } |
---|
| 367 | + |
---|
| 368 | + esp->send_cmd_error = 0; |
---|
| 369 | + esp->send_cmd_residual = 0; |
---|
558 | 370 | |
---|
559 | 371 | if (write) |
---|
560 | 372 | /* DMA receive */ |
---|
.. | .. |
---|
593 | 405 | u8 phase = esp->sreg & ESP_STAT_PMASK; |
---|
594 | 406 | unsigned char *ctrl_data = &zep->ctrl_data; |
---|
595 | 407 | |
---|
596 | | - zep->error = 0; |
---|
597 | 408 | /* Use PIO if transferring message bytes to esp->command_block_dma */ |
---|
598 | 409 | if (phase == ESP_MIP && addr == esp->command_block_dma) { |
---|
599 | | - zorro_esp_send_pio_cmd(esp, (u32) esp->command_block, |
---|
600 | | - esp_count, dma_count, write, cmd); |
---|
| 410 | + esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count, |
---|
| 411 | + dma_count, write, cmd); |
---|
601 | 412 | return; |
---|
602 | 413 | } |
---|
| 414 | + |
---|
| 415 | + esp->send_cmd_error = 0; |
---|
| 416 | + esp->send_cmd_residual = 0; |
---|
603 | 417 | |
---|
604 | 418 | zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW); |
---|
605 | 419 | zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED); |
---|
.. | .. |
---|
638 | 452 | static void zorro_esp_send_cyberII_dma_cmd(struct esp *esp, u32 addr, |
---|
639 | 453 | u32 esp_count, u32 dma_count, int write, u8 cmd) |
---|
640 | 454 | { |
---|
641 | | - struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev); |
---|
642 | 455 | struct cyberII_dma_registers __iomem *dregs = esp->dma_regs; |
---|
643 | 456 | u8 phase = esp->sreg & ESP_STAT_PMASK; |
---|
644 | 457 | |
---|
645 | | - zep->error = 0; |
---|
646 | 458 | /* Use PIO if transferring message bytes to esp->command_block_dma */ |
---|
647 | 459 | if (phase == ESP_MIP && addr == esp->command_block_dma) { |
---|
648 | | - zorro_esp_send_pio_cmd(esp, (u32) esp->command_block, |
---|
649 | | - esp_count, dma_count, write, cmd); |
---|
| 460 | + esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count, |
---|
| 461 | + dma_count, write, cmd); |
---|
650 | 462 | return; |
---|
651 | 463 | } |
---|
| 464 | + |
---|
| 465 | + esp->send_cmd_error = 0; |
---|
| 466 | + esp->send_cmd_residual = 0; |
---|
652 | 467 | |
---|
653 | 468 | zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW); |
---|
654 | 469 | zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED); |
---|
.. | .. |
---|
683 | 498 | u8 phase = esp->sreg & ESP_STAT_PMASK; |
---|
684 | 499 | unsigned char *ctrl_data = &zep->ctrl_data; |
---|
685 | 500 | |
---|
686 | | - zep->error = 0; |
---|
687 | 501 | /* Use PIO if transferring message bytes to esp->command_block_dma */ |
---|
688 | 502 | if (phase == ESP_MIP && addr == esp->command_block_dma) { |
---|
689 | | - zorro_esp_send_pio_cmd(esp, (u32) esp->command_block, |
---|
690 | | - esp_count, dma_count, write, cmd); |
---|
| 503 | + esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count, |
---|
| 504 | + dma_count, write, cmd); |
---|
691 | 505 | return; |
---|
692 | 506 | } |
---|
| 507 | + |
---|
| 508 | + esp->send_cmd_error = 0; |
---|
| 509 | + esp->send_cmd_residual = 0; |
---|
693 | 510 | |
---|
694 | 511 | zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW); |
---|
695 | 512 | zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED); |
---|
.. | .. |
---|
725 | 542 | |
---|
726 | 543 | static int zorro_esp_dma_error(struct esp *esp) |
---|
727 | 544 | { |
---|
728 | | - struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev); |
---|
729 | | - |
---|
730 | | - /* check for error in case we've been doing PIO */ |
---|
731 | | - if (zep->error == 1) |
---|
732 | | - return 1; |
---|
733 | | - |
---|
734 | | - /* do nothing - there seems to be no way to check for DMA errors */ |
---|
735 | | - return 0; |
---|
| 545 | + return esp->send_cmd_error; |
---|
736 | 546 | } |
---|
737 | 547 | |
---|
738 | 548 | /* per-board ESP driver ops */ |
---|
.. | .. |
---|
740 | 550 | static const struct esp_driver_ops blz1230_esp_ops = { |
---|
741 | 551 | .esp_write8 = zorro_esp_write8, |
---|
742 | 552 | .esp_read8 = zorro_esp_read8, |
---|
743 | | - .map_single = zorro_esp_map_single, |
---|
744 | | - .map_sg = zorro_esp_map_sg, |
---|
745 | | - .unmap_single = zorro_esp_unmap_single, |
---|
746 | | - .unmap_sg = zorro_esp_unmap_sg, |
---|
747 | 553 | .irq_pending = zorro_esp_irq_pending, |
---|
748 | 554 | .dma_length_limit = zorro_esp_dma_length_limit, |
---|
749 | 555 | .reset_dma = zorro_esp_reset_dma, |
---|
.. | .. |
---|
756 | 562 | static const struct esp_driver_ops blz1230II_esp_ops = { |
---|
757 | 563 | .esp_write8 = zorro_esp_write8, |
---|
758 | 564 | .esp_read8 = zorro_esp_read8, |
---|
759 | | - .map_single = zorro_esp_map_single, |
---|
760 | | - .map_sg = zorro_esp_map_sg, |
---|
761 | | - .unmap_single = zorro_esp_unmap_single, |
---|
762 | | - .unmap_sg = zorro_esp_unmap_sg, |
---|
763 | 565 | .irq_pending = zorro_esp_irq_pending, |
---|
764 | 566 | .dma_length_limit = zorro_esp_dma_length_limit, |
---|
765 | 567 | .reset_dma = zorro_esp_reset_dma, |
---|
.. | .. |
---|
772 | 574 | static const struct esp_driver_ops blz2060_esp_ops = { |
---|
773 | 575 | .esp_write8 = zorro_esp_write8, |
---|
774 | 576 | .esp_read8 = zorro_esp_read8, |
---|
775 | | - .map_single = zorro_esp_map_single, |
---|
776 | | - .map_sg = zorro_esp_map_sg, |
---|
777 | | - .unmap_single = zorro_esp_unmap_single, |
---|
778 | | - .unmap_sg = zorro_esp_unmap_sg, |
---|
779 | 577 | .irq_pending = zorro_esp_irq_pending, |
---|
780 | 578 | .dma_length_limit = zorro_esp_dma_length_limit, |
---|
781 | 579 | .reset_dma = zorro_esp_reset_dma, |
---|
.. | .. |
---|
788 | 586 | static const struct esp_driver_ops cyber_esp_ops = { |
---|
789 | 587 | .esp_write8 = zorro_esp_write8, |
---|
790 | 588 | .esp_read8 = zorro_esp_read8, |
---|
791 | | - .map_single = zorro_esp_map_single, |
---|
792 | | - .map_sg = zorro_esp_map_sg, |
---|
793 | | - .unmap_single = zorro_esp_unmap_single, |
---|
794 | | - .unmap_sg = zorro_esp_unmap_sg, |
---|
795 | 589 | .irq_pending = cyber_esp_irq_pending, |
---|
796 | 590 | .dma_length_limit = zorro_esp_dma_length_limit, |
---|
797 | 591 | .reset_dma = zorro_esp_reset_dma, |
---|
.. | .. |
---|
804 | 598 | static const struct esp_driver_ops cyberII_esp_ops = { |
---|
805 | 599 | .esp_write8 = zorro_esp_write8, |
---|
806 | 600 | .esp_read8 = zorro_esp_read8, |
---|
807 | | - .map_single = zorro_esp_map_single, |
---|
808 | | - .map_sg = zorro_esp_map_sg, |
---|
809 | | - .unmap_single = zorro_esp_unmap_single, |
---|
810 | | - .unmap_sg = zorro_esp_unmap_sg, |
---|
811 | 601 | .irq_pending = zorro_esp_irq_pending, |
---|
812 | 602 | .dma_length_limit = zorro_esp_dma_length_limit, |
---|
813 | 603 | .reset_dma = zorro_esp_reset_dma, |
---|
.. | .. |
---|
820 | 610 | static const struct esp_driver_ops fastlane_esp_ops = { |
---|
821 | 611 | .esp_write8 = zorro_esp_write8, |
---|
822 | 612 | .esp_read8 = zorro_esp_read8, |
---|
823 | | - .map_single = zorro_esp_map_single, |
---|
824 | | - .map_sg = zorro_esp_map_sg, |
---|
825 | | - .unmap_single = zorro_esp_unmap_single, |
---|
826 | | - .unmap_sg = zorro_esp_unmap_sg, |
---|
827 | 613 | .irq_pending = fastlane_esp_irq_pending, |
---|
828 | 614 | .dma_length_limit = fastlane_esp_dma_length_limit, |
---|
829 | 615 | .reset_dma = zorro_esp_reset_dma, |
---|
.. | .. |
---|
1015 | 801 | /* additional setup required for Fastlane */ |
---|
1016 | 802 | if (zep->zorro3 && ent->driver_data == ZORRO_BLZ1230II) { |
---|
1017 | 803 | /* map full address space up to ESP base for DMA */ |
---|
1018 | | - zep->board_base = ioremap_nocache(board, |
---|
1019 | | - FASTLANE_ESP_ADDR-1); |
---|
| 804 | + zep->board_base = ioremap(board, FASTLANE_ESP_ADDR - 1); |
---|
1020 | 805 | if (!zep->board_base) { |
---|
1021 | 806 | pr_err("Cannot allocate board address space\n"); |
---|
1022 | 807 | err = -ENOMEM; |
---|
.. | .. |
---|
1030 | 815 | esp->ops = zdd->esp_ops; |
---|
1031 | 816 | |
---|
1032 | 817 | if (ioaddr > 0xffffff) |
---|
1033 | | - esp->regs = ioremap_nocache(ioaddr, 0x20); |
---|
| 818 | + esp->regs = ioremap(ioaddr, 0x20); |
---|
1034 | 819 | else |
---|
1035 | 820 | /* ZorroII address space remapped nocache by early startup */ |
---|
1036 | 821 | esp->regs = ZTWO_VADDR(ioaddr); |
---|
.. | .. |
---|
1039 | 824 | err = -ENOMEM; |
---|
1040 | 825 | goto fail_unmap_fastlane; |
---|
1041 | 826 | } |
---|
| 827 | + |
---|
| 828 | + esp->fifo_reg = esp->regs + ESP_FDATA * 4; |
---|
1042 | 829 | |
---|
1043 | 830 | /* Check whether a Blizzard 12x0 or CyberstormII really has SCSI */ |
---|
1044 | 831 | if (zdd->scsi_option) { |
---|
.. | .. |
---|
1054 | 841 | * Only Fastlane Z3 for now - add switch for correct struct |
---|
1055 | 842 | * dma_registers size if adding any more |
---|
1056 | 843 | */ |
---|
1057 | | - esp->dma_regs = ioremap_nocache(dmaaddr, |
---|
1058 | | - sizeof(struct fastlane_dma_registers)); |
---|
| 844 | + esp->dma_regs = ioremap(dmaaddr, |
---|
| 845 | + sizeof(struct fastlane_dma_registers)); |
---|
1059 | 846 | } else |
---|
1060 | 847 | /* ZorroII address space remapped nocache by early startup */ |
---|
1061 | 848 | esp->dma_regs = ZTWO_VADDR(dmaaddr); |
---|
.. | .. |
---|
1083 | 870 | } |
---|
1084 | 871 | |
---|
1085 | 872 | /* register the chip */ |
---|
1086 | | - err = scsi_esp_register(esp, &z->dev); |
---|
| 873 | + err = scsi_esp_register(esp); |
---|
1087 | 874 | |
---|
1088 | 875 | if (err) { |
---|
1089 | 876 | err = -ENOMEM; |
---|