.. | .. |
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38 | 38 | #define OEM_ID_INTEL 0x8000 |
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39 | 39 | |
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40 | 40 | /* controller classes */ |
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41 | | -#define GDT_ISA 0x01 /* ISA controller */ |
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42 | | -#define GDT_EISA 0x02 /* EISA controller */ |
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43 | 41 | #define GDT_PCI 0x03 /* PCI controller */ |
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44 | 42 | #define GDT_PCINEW 0x04 /* new PCI controller */ |
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45 | 43 | #define GDT_PCIMPR 0x05 /* PCI MPR controller */ |
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46 | | -/* GDT_EISA, controller subtypes EISA */ |
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47 | | -#define GDT3_ID 0x0130941c /* GDT3000/3020 */ |
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48 | | -#define GDT3A_ID 0x0230941c /* GDT3000A/3020A/3050A */ |
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49 | | -#define GDT3B_ID 0x0330941c /* GDT3000B/3010A */ |
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50 | | -/* GDT_ISA */ |
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51 | | -#define GDT2_ID 0x0120941c /* GDT2000/2020 */ |
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52 | 44 | |
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53 | 45 | #ifndef PCI_DEVICE_ID_VORTEX_GDT60x0 |
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54 | 46 | /* GDT_PCI */ |
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.. | .. |
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280 | 272 | /* data directions */ |
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281 | 273 | #define GDTH_DATA_IN 0x01000000L /* data from target */ |
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282 | 274 | #define GDTH_DATA_OUT 0x00000000L /* data to target */ |
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283 | | - |
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284 | | -/* BMIC registers (EISA controllers) */ |
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285 | | -#define ID0REG 0x0c80 /* board ID */ |
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286 | | -#define EINTENABREG 0x0c89 /* interrupt enable */ |
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287 | | -#define SEMA0REG 0x0c8a /* command semaphore */ |
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288 | | -#define SEMA1REG 0x0c8b /* status semaphore */ |
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289 | | -#define LDOORREG 0x0c8d /* local doorbell */ |
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290 | | -#define EDENABREG 0x0c8e /* EISA system doorbell enab. */ |
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291 | | -#define EDOORREG 0x0c8f /* EISA system doorbell */ |
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292 | | -#define MAILBOXREG 0x0c90 /* mailbox reg. (16 bytes) */ |
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293 | | -#define EISAREG 0x0cc0 /* EISA configuration */ |
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294 | 275 | |
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295 | 276 | /* other defines */ |
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296 | 277 | #define LINUX_OS 8 /* used for cache optim. */ |
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.. | .. |
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706 | 687 | u8 fw_magic; /* contr. ID from firmware */ |
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707 | 688 | } __attribute__((packed)) gdt_pci_sram; |
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708 | 689 | |
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709 | | -/* SRAM structure EISA controllers (but NOT GDT3000/3020) */ |
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710 | | -typedef struct { |
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711 | | - u8 os_used[16]; /* OS code per service */ |
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712 | | - u16 need_deinit; /* switch betw. BIOS/driver */ |
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713 | | - u8 switch_support; /* see need_deinit */ |
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714 | | - u8 padding; |
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715 | | -} __attribute__((packed)) gdt_eisa_sram; |
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716 | | - |
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717 | | - |
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718 | 690 | /* DPRAM ISA controllers */ |
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719 | 691 | typedef struct { |
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720 | 692 | union { |
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721 | 693 | struct { |
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722 | 694 | u8 bios_used[0x3c00-32]; /* 15KB - 32Bytes BIOS */ |
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723 | | - u32 magic; /* controller (EISA) ID */ |
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724 | 695 | u16 need_deinit; /* switch betw. BIOS/driver */ |
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725 | 696 | u8 switch_support; /* see need_deinit */ |
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726 | 697 | u8 padding[9]; |
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.. | .. |
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843 | 814 | u16 cache_feat; /* feat. cache serv. (s/g,..)*/ |
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844 | 815 | u16 raw_feat; /* feat. raw service (s/g,..)*/ |
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845 | 816 | u16 screen_feat; /* feat. raw service (s/g,..)*/ |
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846 | | - u16 bmic; /* BMIC address (EISA) */ |
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847 | 817 | void __iomem *brd; /* DPRAM address */ |
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848 | 818 | u32 brd_phys; /* slot number/BIOS address */ |
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849 | 819 | gdt6c_plx_regs *plx; /* PLX regs (new PCI contr.) */ |
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