hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/scsi/esp_scsi.h
....@@ -78,12 +78,14 @@
7878 #define ESP_CONFIG3_IMS 0x80 /* ID msg chk'ng (esp/fas236) */
7979 #define ESP_CONFIG3_OBPUSH 0x80 /* Push odd-byte to dma (hme) */
8080
81
-/* ESP config register 4 read-write, found only on am53c974 chips */
82
-#define ESP_CONFIG4_RADE 0x04 /* Active negation */
83
-#define ESP_CONFIG4_RAE 0x08 /* Active negation on REQ and ACK */
84
-#define ESP_CONFIG4_PWD 0x20 /* Reduced power feature */
85
-#define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 */
86
-#define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 */
81
+/* ESP config register 4 read-write */
82
+#define ESP_CONFIG4_BBTE 0x01 /* Back-to-back transfers (fsc) */
83
+#define ESP_CONGIG4_TEST 0x02 /* Transfer counter test mode (fsc) */
84
+#define ESP_CONFIG4_RADE 0x04 /* Active negation (am53c974/fsc) */
85
+#define ESP_CONFIG4_RAE 0x08 /* Act. negation REQ/ACK (am53c974) */
86
+#define ESP_CONFIG4_PWD 0x20 /* Reduced power feature (am53c974) */
87
+#define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 (am53c974) */
88
+#define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 (am53c974) */
8789
8890 #define ESP_CONFIG_GE_12NS (0)
8991 #define ESP_CONFIG_GE_25NS (ESP_CONFIG_GE1)
....@@ -209,10 +211,15 @@
209211 #define ESP_TEST_TS 0x04 /* Tristate test mode */
210212
211213 /* ESP unique ID register read-only, found on fas236+fas100a only */
214
+#define ESP_UID_FAM 0xf8 /* ESP family bitmask */
215
+
216
+#define ESP_FAMILY(uid) (((uid) & ESP_UID_FAM) >> 3)
217
+
218
+/* Values for the ESP family bits */
212219 #define ESP_UID_F100A 0x00 /* ESP FAS100A */
213220 #define ESP_UID_F236 0x02 /* ESP FAS236 */
214
-#define ESP_UID_REV 0x07 /* ESP revision */
215
-#define ESP_UID_FAM 0xf8 /* ESP family */
221
+#define ESP_UID_HME 0x0a /* FAS HME */
222
+#define ESP_UID_FSC 0x14 /* NCR/Symbios Logic 53CF9x-2 */
216223
217224 /* ESP fifo flags register read-only */
218225 /* Note that the following implies a 16 byte FIFO on the ESP. */
....@@ -249,26 +256,25 @@
249256 #define SYNC_DEFP_FAST 0x19 /* 10mb/s */
250257
251258 struct esp_cmd_priv {
252
- union {
253
- dma_addr_t dma_addr;
254
- int num_sg;
255
- } u;
256
-
259
+ int num_sg;
257260 int cur_residue;
261
+ struct scatterlist *prv_sg;
258262 struct scatterlist *cur_sg;
259263 int tot_residue;
260264 };
261265 #define ESP_CMD_PRIV(CMD) ((struct esp_cmd_priv *)(&(CMD)->SCp))
262266
267
+/* NOTE: this enum is ordered based on chip features! */
263268 enum esp_rev {
264
- ESP100 = 0x00, /* NCR53C90 - very broken */
265
- ESP100A = 0x01, /* NCR53C90A */
266
- ESP236 = 0x02,
267
- FAS236 = 0x03,
268
- FAS100A = 0x04,
269
- FAST = 0x05,
270
- FASHME = 0x06,
271
- PCSCSI = 0x07, /* AM53c974 */
269
+ ESP100, /* NCR53C90 - very broken */
270
+ ESP100A, /* NCR53C90A */
271
+ ESP236,
272
+ FAS236,
273
+ PCSCSI, /* AM53c974 */
274
+ FSC, /* NCR/Symbios Logic 53CF9x-2 */
275
+ FAS100A,
276
+ FAST,
277
+ FASHME,
272278 };
273279
274280 struct esp_cmd_entry {
....@@ -277,6 +283,7 @@
277283 struct scsi_cmnd *cmd;
278284
279285 unsigned int saved_cur_residue;
286
+ struct scatterlist *saved_prv_sg;
280287 struct scatterlist *saved_cur_sg;
281288 unsigned int saved_tot_residue;
282289
....@@ -363,19 +370,6 @@
363370 void (*esp_write8)(struct esp *esp, u8 val, unsigned long reg);
364371 u8 (*esp_read8)(struct esp *esp, unsigned long reg);
365372
366
- /* Map and unmap DMA memory. Eventually the driver will be
367
- * converted to the generic DMA API as soon as SBUS is able to
368
- * cope with that. At such time we can remove this.
369
- */
370
- dma_addr_t (*map_single)(struct esp *esp, void *buf,
371
- size_t sz, int dir);
372
- int (*map_sg)(struct esp *esp, struct scatterlist *sg,
373
- int num_sg, int dir);
374
- void (*unmap_single)(struct esp *esp, dma_addr_t addr,
375
- size_t sz, int dir);
376
- void (*unmap_sg)(struct esp *esp, struct scatterlist *sg,
377
- int num_sg, int dir);
378
-
379373 /* Return non-zero if there is an IRQ pending. Usually this
380374 * status bit lives in the DMA controller sitting in front of
381375 * the ESP. This has to be accurate or else the ESP interrupt
....@@ -435,7 +429,7 @@
435429 const struct esp_driver_ops *ops;
436430
437431 struct Scsi_Host *host;
438
- void *dev;
432
+ struct device *dev;
439433
440434 struct esp_cmd_entry *active_cmd;
441435
....@@ -490,11 +484,11 @@
490484 u32 flags;
491485 #define ESP_FLAG_DIFFERENTIAL 0x00000001
492486 #define ESP_FLAG_RESETTING 0x00000002
493
-#define ESP_FLAG_DOING_SLOWCMD 0x00000004
494487 #define ESP_FLAG_WIDE_CAPABLE 0x00000008
495488 #define ESP_FLAG_QUICKIRQ_CHECK 0x00000010
496489 #define ESP_FLAG_DISABLE_SYNC 0x00000020
497490 #define ESP_FLAG_USE_FIFO 0x00000040
491
+#define ESP_FLAG_NO_DMA_MAP 0x00000080
498492
499493 u8 select_state;
500494 #define ESP_SELECT_NONE 0x00 /* Not selecting */
....@@ -532,7 +526,7 @@
532526 u32 min_period;
533527 u32 radelay;
534528
535
- /* Slow command state. */
529
+ /* ESP_CMD_SELAS command state */
536530 u8 *cmd_bytes_ptr;
537531 int cmd_bytes_left;
538532
....@@ -541,6 +535,9 @@
541535 void *dma;
542536 int dmarev;
543537
538
+ /* These are used by esp_send_pio_cmd() */
539
+ u8 __iomem *fifo_reg;
540
+ int send_cmd_error;
544541 u32 send_cmd_residual;
545542 };
546543
....@@ -570,16 +567,18 @@
570567 * example, the DMA engine has to be reset before ESP can
571568 * be programmed.
572569 * 11) If necessary, call dev_set_drvdata() as needed.
573
- * 12) Call scsi_esp_register() with prepared 'esp' structure
574
- * and a device pointer if possible.
570
+ * 12) Call scsi_esp_register() with prepared 'esp' structure.
575571 * 13) Check scsi_esp_register() return value, release all resources
576572 * if an error was returned.
577573 */
578574 extern struct scsi_host_template scsi_esp_template;
579
-extern int scsi_esp_register(struct esp *, struct device *);
575
+extern int scsi_esp_register(struct esp *);
580576
581577 extern void scsi_esp_unregister(struct esp *);
582578 extern irqreturn_t scsi_esp_intr(int, void *);
583579 extern void scsi_esp_cmd(struct esp *, u8);
584580
581
+extern void esp_send_pio_cmd(struct esp *esp, u32 dma_addr, u32 esp_count,
582
+ u32 dma_count, int write, u8 cmd);
583
+
585584 #endif /* !(_ESP_SCSI_H) */