add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/rtc/rtc-rockchip.c
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@@ -555,6 +555,31 @@
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 	return;
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 }
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+static bool rockchip_rtc_is_trimed(struct rockchip_rtc *rtc)
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+{
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+	int ret, comp_done;
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+
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+	ret = regmap_read(rtc->regmap, RTC_CTRL, &comp_done);
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+	if (ret) {
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+		pr_err("%s: Failed to read RTC_CTRL: %d\n", __func__, ret);
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+		return false;
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+	}
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+	return (comp_done & CLK32K_COMP_EN) == CLK32K_COMP_EN;
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+}
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+
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+static void rockchip_rtc_trim_start(struct rockchip_rtc *rtc)
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+{
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+	if (!rockchip_rtc_is_trimed(rtc))
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+		queue_delayed_work(system_long_wq, &rtc->trim_work,
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+				   msecs_to_jiffies(5000));
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+}
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+
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+static void __maybe_unused rockchip_rtc_trim_close(struct rockchip_rtc *rtc)
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+{
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+	if (!rockchip_rtc_is_trimed(rtc))
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+		cancel_delayed_work_sync(&rtc->trim_work);
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+}
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+
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 /* Enable the alarm if it should be enabled (in case it was disabled to
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  * prevent use as a wake source).
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  */
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@@ -567,6 +592,8 @@
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 	if (device_may_wakeup(dev))
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 		enable_irq_wake(rtc->irq);
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+
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+	rockchip_rtc_trim_close(rtc);
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 	if (rtc->grf) {
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 		switch (rtc->mode) {
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@@ -610,6 +637,7 @@
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 		dev_err(dev, "Cannot enable clock.\n");
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 		return ret;
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 	}
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+	rockchip_rtc_trim_start(rtc);
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 	return 0;
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 }
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@@ -761,7 +789,7 @@
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 				     rtc->irq);
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 	INIT_DELAYED_WORK(&rtc->trim_work, rockchip_rtc_compensation_delay_work);
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-	queue_delayed_work(system_long_wq, &rtc->trim_work, 3000);
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+	rockchip_rtc_trim_start(rtc);
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 	return rtc_register_device(rtc->rtc);
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 }