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| 1 | +// SPDX-License-Identifier: GPL-2.0+ |
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1 | 2 | /* |
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2 | 3 | * TI OMAP Real Time Clock interface for Linux |
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3 | 4 | * |
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.. | .. |
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6 | 7 | * |
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7 | 8 | * Copyright (C) 2006 David Brownell (new RTC framework) |
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8 | 9 | * Copyright (C) 2014 Johan Hovold <johan@kernel.org> |
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9 | | - * |
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10 | | - * This program is free software; you can redistribute it and/or |
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11 | | - * modify it under the terms of the GNU General Public License |
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12 | | - * as published by the Free Software Foundation; either version |
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13 | | - * 2 of the License, or (at your option) any later version. |
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14 | 10 | */ |
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15 | 11 | |
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16 | | -#include <dt-bindings/gpio/gpio.h> |
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17 | 12 | #include <linux/bcd.h> |
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18 | 13 | #include <linux/clk.h> |
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19 | 14 | #include <linux/delay.h> |
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.. | .. |
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30 | 25 | #include <linux/platform_device.h> |
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31 | 26 | #include <linux/pm_runtime.h> |
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32 | 27 | #include <linux/rtc.h> |
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| 28 | +#include <linux/rtc/rtc-omap.h> |
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33 | 29 | |
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34 | 30 | /* |
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35 | 31 | * The OMAP RTC is a year/month/day/hours/minutes/seconds BCD clock |
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.. | .. |
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271 | 267 | } |
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272 | 268 | |
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273 | 269 | /* this hardware doesn't support "don't care" alarm fields */ |
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274 | | -static int tm2bcd(struct rtc_time *tm) |
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| 270 | +static void tm2bcd(struct rtc_time *tm) |
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275 | 271 | { |
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276 | 272 | tm->tm_sec = bin2bcd(tm->tm_sec); |
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277 | 273 | tm->tm_min = bin2bcd(tm->tm_min); |
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.. | .. |
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279 | 275 | tm->tm_mday = bin2bcd(tm->tm_mday); |
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280 | 276 | |
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281 | 277 | tm->tm_mon = bin2bcd(tm->tm_mon + 1); |
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282 | | - |
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283 | | - /* epoch == 1900 */ |
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284 | | - if (tm->tm_year < 100 || tm->tm_year > 199) |
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285 | | - return -EINVAL; |
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286 | 278 | tm->tm_year = bin2bcd(tm->tm_year - 100); |
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287 | | - |
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288 | | - return 0; |
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289 | 279 | } |
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290 | 280 | |
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291 | 281 | static void bcd2tm(struct rtc_time *tm) |
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.. | .. |
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328 | 318 | { |
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329 | 319 | struct omap_rtc *rtc = dev_get_drvdata(dev); |
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330 | 320 | |
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331 | | - if (tm2bcd(tm) < 0) |
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332 | | - return -EINVAL; |
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| 321 | + tm2bcd(tm); |
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333 | 322 | |
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334 | 323 | local_irq_disable(); |
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335 | 324 | rtc_wait_not_busy(rtc); |
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.. | .. |
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378 | 367 | struct omap_rtc *rtc = dev_get_drvdata(dev); |
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379 | 368 | u8 reg, irqwake_reg = 0; |
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380 | 369 | |
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381 | | - if (tm2bcd(&alm->time) < 0) |
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382 | | - return -EINVAL; |
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| 370 | + tm2bcd(&alm->time); |
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383 | 371 | |
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384 | 372 | local_irq_disable(); |
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385 | 373 | rtc_wait_not_busy(rtc); |
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.. | .. |
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415 | 403 | |
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416 | 404 | static struct omap_rtc *omap_rtc_power_off_rtc; |
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417 | 405 | |
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418 | | -/* |
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419 | | - * omap_rtc_poweroff: RTC-controlled power off |
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420 | | - * |
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421 | | - * The RTC can be used to control an external PMIC via the pmic_power_en pin, |
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422 | | - * which can be configured to transition to OFF on ALARM2 events. |
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423 | | - * |
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424 | | - * Notes: |
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425 | | - * The two-second alarm offset is the shortest offset possible as the alarm |
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426 | | - * registers must be set before the next timer update and the offset |
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427 | | - * calculation is too heavy for everything to be done within a single access |
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428 | | - * period (~15 us). |
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429 | | - * |
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430 | | - * Called with local interrupts disabled. |
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| 406 | +/** |
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| 407 | + * omap_rtc_power_off_program: Set the pmic power off sequence. The RTC |
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| 408 | + * generates pmic_pwr_enable control, which can be used to control an external |
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| 409 | + * PMIC. |
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431 | 410 | */ |
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432 | | -static void omap_rtc_power_off(void) |
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| 411 | +int omap_rtc_power_off_program(struct device *dev) |
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433 | 412 | { |
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434 | 413 | struct omap_rtc *rtc = omap_rtc_power_off_rtc; |
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435 | 414 | struct rtc_time tm; |
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436 | 415 | unsigned long now; |
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| 416 | + int seconds; |
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437 | 417 | u32 val; |
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438 | 418 | |
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439 | 419 | rtc->type->unlock(rtc); |
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.. | .. |
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441 | 421 | val = rtc_readl(rtc, OMAP_RTC_PMIC_REG); |
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442 | 422 | rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN); |
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443 | 423 | |
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444 | | - /* set alarm two seconds from now */ |
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445 | | - omap_rtc_read_time_raw(rtc, &tm); |
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446 | | - bcd2tm(&tm); |
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447 | | - rtc_tm_to_time(&tm, &now); |
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448 | | - rtc_time_to_tm(now + 2, &tm); |
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| 424 | +again: |
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| 425 | + /* Clear any existing ALARM2 event */ |
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| 426 | + rtc_writel(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM2); |
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449 | 427 | |
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450 | | - if (tm2bcd(&tm) < 0) { |
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451 | | - dev_err(&rtc->rtc->dev, "power off failed\n"); |
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452 | | - rtc->type->lock(rtc); |
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453 | | - return; |
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454 | | - } |
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| 428 | + /* set alarm one second from now */ |
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| 429 | + omap_rtc_read_time_raw(rtc, &tm); |
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| 430 | + seconds = tm.tm_sec; |
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| 431 | + bcd2tm(&tm); |
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| 432 | + now = rtc_tm_to_time64(&tm); |
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| 433 | + rtc_time64_to_tm(now + 1, &tm); |
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| 434 | + |
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| 435 | + tm2bcd(&tm); |
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455 | 436 | |
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456 | 437 | rtc_wait_not_busy(rtc); |
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457 | 438 | |
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.. | .. |
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470 | 451 | val = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG); |
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471 | 452 | rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, |
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472 | 453 | val | OMAP_RTC_INTERRUPTS_IT_ALARM2); |
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| 454 | + |
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| 455 | + /* Retry in case roll over happened before alarm was armed. */ |
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| 456 | + if (rtc_read(rtc, OMAP_RTC_SECONDS_REG) != seconds) { |
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| 457 | + val = rtc_read(rtc, OMAP_RTC_STATUS_REG); |
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| 458 | + if (!(val & OMAP_RTC_STATUS_ALARM2)) |
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| 459 | + goto again; |
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| 460 | + } |
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| 461 | + |
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473 | 462 | rtc->type->lock(rtc); |
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474 | 463 | |
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| 464 | + return 0; |
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| 465 | +} |
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| 466 | +EXPORT_SYMBOL(omap_rtc_power_off_program); |
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| 467 | + |
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| 468 | +/* |
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| 469 | + * omap_rtc_poweroff: RTC-controlled power off |
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| 470 | + * |
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| 471 | + * The RTC can be used to control an external PMIC via the pmic_power_en pin, |
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| 472 | + * which can be configured to transition to OFF on ALARM2 events. |
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| 473 | + * |
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| 474 | + * Notes: |
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| 475 | + * The one-second alarm offset is the shortest offset possible as the alarm |
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| 476 | + * registers must be set before the next timer update and the offset |
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| 477 | + * calculation is too heavy for everything to be done within a single access |
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| 478 | + * period (~15 us). |
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| 479 | + * |
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| 480 | + * Called with local interrupts disabled. |
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| 481 | + */ |
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| 482 | +static void omap_rtc_power_off(void) |
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| 483 | +{ |
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| 484 | + struct rtc_device *rtc = omap_rtc_power_off_rtc->rtc; |
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| 485 | + u32 val; |
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| 486 | + |
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| 487 | + omap_rtc_power_off_program(rtc->dev.parent); |
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| 488 | + |
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| 489 | + /* Set PMIC power enable and EXT_WAKEUP in case PB power on is used */ |
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| 490 | + omap_rtc_power_off_rtc->type->unlock(omap_rtc_power_off_rtc); |
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| 491 | + val = rtc_readl(omap_rtc_power_off_rtc, OMAP_RTC_PMIC_REG); |
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| 492 | + val |= OMAP_RTC_PMIC_POWER_EN_EN | OMAP_RTC_PMIC_EXT_WKUP_POL(0) | |
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| 493 | + OMAP_RTC_PMIC_EXT_WKUP_EN(0); |
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| 494 | + rtc_writel(omap_rtc_power_off_rtc, OMAP_RTC_PMIC_REG, val); |
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| 495 | + omap_rtc_power_off_rtc->type->lock(omap_rtc_power_off_rtc); |
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| 496 | + |
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475 | 497 | /* |
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476 | | - * Wait for alarm to trigger (within two seconds) and external PMIC to |
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| 498 | + * Wait for alarm to trigger (within one second) and external PMIC to |
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477 | 499 | * power off the system. Add a 500 ms margin for external latencies |
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478 | 500 | * (e.g. debounce circuits). |
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479 | 501 | */ |
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480 | | - mdelay(2500); |
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| 502 | + mdelay(1500); |
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481 | 503 | } |
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482 | 504 | |
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483 | 505 | static const struct rtc_class_ops omap_rtc_ops = { |
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.. | .. |
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594 | 616 | break; |
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595 | 617 | default: |
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596 | 618 | return -ENOTSUPP; |
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597 | | - }; |
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| 619 | + } |
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598 | 620 | |
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599 | 621 | *config = pinconf_to_config_packed(param, arg); |
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600 | 622 | |
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.. | .. |
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705 | 727 | static int omap_rtc_probe(struct platform_device *pdev) |
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706 | 728 | { |
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707 | 729 | struct omap_rtc *rtc; |
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708 | | - struct resource *res; |
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709 | 730 | u8 reg, mask, new_ctrl; |
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710 | 731 | const struct platform_device_id *id_entry; |
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711 | 732 | const struct of_device_id *of_id; |
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.. | .. |
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719 | 740 | if (of_id) { |
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720 | 741 | rtc->type = of_id->data; |
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721 | 742 | rtc->is_pmic_controller = rtc->type->has_pmic_mode && |
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722 | | - of_property_read_bool(pdev->dev.of_node, |
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723 | | - "system-power-controller"); |
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| 743 | + of_device_is_system_power_controller(pdev->dev.of_node); |
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724 | 744 | } else { |
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725 | 745 | id_entry = platform_get_device_id(pdev); |
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726 | 746 | rtc->type = (void *)id_entry->driver_data; |
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.. | .. |
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743 | 763 | if (!IS_ERR(rtc->clk)) |
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744 | 764 | clk_prepare_enable(rtc->clk); |
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745 | 765 | |
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746 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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747 | | - rtc->base = devm_ioremap_resource(&pdev->dev, res); |
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| 766 | + rtc->base = devm_platform_ioremap_resource(pdev, 0); |
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748 | 767 | if (IS_ERR(rtc->base)) { |
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749 | 768 | clk_disable_unprepare(rtc->clk); |
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750 | 769 | return PTR_ERR(rtc->base); |
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.. | .. |
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841 | 860 | } |
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842 | 861 | |
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843 | 862 | rtc->rtc->ops = &omap_rtc_ops; |
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| 863 | + rtc->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
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| 864 | + rtc->rtc->range_max = RTC_TIMESTAMP_END_2099; |
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844 | 865 | omap_rtc_nvmem_config.priv = rtc; |
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845 | 866 | |
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846 | 867 | /* handle periodic and alarm irqs */ |
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