hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/rtc/rtc-mt6397.c
....@@ -1,108 +1,38 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright (c) 2014-2015 MediaTek Inc.
34 * Author: Tianping.Fang <tianping.fang@mediatek.com>
4
-*
5
-* This program is free software; you can redistribute it and/or modify
6
-* it under the terms of the GNU General Public License version 2 as
7
-* published by the Free Software Foundation.
8
-*
9
-* This program is distributed in the hope that it will be useful,
10
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
-* GNU General Public License for more details.
135 */
146
15
-#include <linux/delay.h>
16
-#include <linux/init.h>
7
+#include <linux/err.h>
8
+#include <linux/interrupt.h>
9
+#include <linux/mfd/mt6397/core.h>
1710 #include <linux/module.h>
11
+#include <linux/mutex.h>
12
+#include <linux/of_device.h>
13
+#include <linux/platform_device.h>
1814 #include <linux/regmap.h>
1915 #include <linux/rtc.h>
20
-#include <linux/irqdomain.h>
21
-#include <linux/platform_device.h>
22
-#include <linux/of_address.h>
23
-#include <linux/of_irq.h>
24
-#include <linux/io.h>
25
-#include <linux/mfd/mt6397/core.h>
26
-
27
-#define RTC_BBPU 0x0000
28
-#define RTC_BBPU_CBUSY BIT(6)
29
-
30
-#define RTC_WRTGR 0x003c
31
-
32
-#define RTC_IRQ_STA 0x0002
33
-#define RTC_IRQ_STA_AL BIT(0)
34
-#define RTC_IRQ_STA_LP BIT(3)
35
-
36
-#define RTC_IRQ_EN 0x0004
37
-#define RTC_IRQ_EN_AL BIT(0)
38
-#define RTC_IRQ_EN_ONESHOT BIT(2)
39
-#define RTC_IRQ_EN_LP BIT(3)
40
-#define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
41
-
42
-#define RTC_AL_MASK 0x0008
43
-#define RTC_AL_MASK_DOW BIT(4)
44
-
45
-#define RTC_TC_SEC 0x000a
46
-/* Min, Hour, Dom... register offset to RTC_TC_SEC */
47
-#define RTC_OFFSET_SEC 0
48
-#define RTC_OFFSET_MIN 1
49
-#define RTC_OFFSET_HOUR 2
50
-#define RTC_OFFSET_DOM 3
51
-#define RTC_OFFSET_DOW 4
52
-#define RTC_OFFSET_MTH 5
53
-#define RTC_OFFSET_YEAR 6
54
-#define RTC_OFFSET_COUNT 7
55
-
56
-#define RTC_AL_SEC 0x0018
57
-
58
-#define RTC_AL_SEC_MASK 0x003f
59
-#define RTC_AL_MIN_MASK 0x003f
60
-#define RTC_AL_HOU_MASK 0x001f
61
-#define RTC_AL_DOM_MASK 0x001f
62
-#define RTC_AL_DOW_MASK 0x0007
63
-#define RTC_AL_MTH_MASK 0x000f
64
-#define RTC_AL_YEA_MASK 0x007f
65
-
66
-#define RTC_PDN2 0x002e
67
-#define RTC_PDN2_PWRON_ALARM BIT(4)
68
-
69
-#define RTC_MIN_YEAR 1968
70
-#define RTC_BASE_YEAR 1900
71
-#define RTC_NUM_YEARS 128
72
-#define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR)
73
-
74
-struct mt6397_rtc {
75
- struct device *dev;
76
- struct rtc_device *rtc_dev;
77
- struct mutex lock;
78
- struct regmap *regmap;
79
- int irq;
80
- u32 addr_base;
81
-};
16
+#include <linux/mfd/mt6397/rtc.h>
17
+#include <linux/mod_devicetable.h>
8218
8319 static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
8420 {
85
- unsigned long timeout = jiffies + HZ;
8621 int ret;
8722 u32 data;
8823
89
- ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);
24
+ ret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1);
9025 if (ret < 0)
9126 return ret;
9227
93
- while (1) {
94
- ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
95
- &data);
96
- if (ret < 0)
97
- break;
98
- if (!(data & RTC_BBPU_CBUSY))
99
- break;
100
- if (time_after(jiffies, timeout)) {
101
- ret = -ETIMEDOUT;
102
- break;
103
- }
104
- cpu_relax();
105
- }
28
+ ret = regmap_read_poll_timeout(rtc->regmap,
29
+ rtc->addr_base + RTC_BBPU, data,
30
+ !(data & RTC_BBPU_CBUSY),
31
+ MTK_RTC_POLL_DELAY_US,
32
+ MTK_RTC_POLL_TIMEOUT);
33
+ if (ret < 0)
34
+ dev_err(rtc->rtc_dev->dev.parent,
35
+ "failed to write WRTGR: %d\n", ret);
10636
10737 return ret;
10838 }
....@@ -339,26 +269,30 @@
339269 return -ENOMEM;
340270
341271 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
272
+ if (!res)
273
+ return -EINVAL;
342274 rtc->addr_base = res->start;
275
+
276
+ rtc->data = of_device_get_match_data(&pdev->dev);
343277
344278 rtc->irq = platform_get_irq(pdev, 0);
345279 if (rtc->irq < 0)
346280 return rtc->irq;
347281
348282 rtc->regmap = mt6397_chip->regmap;
349
- rtc->dev = &pdev->dev;
350283 mutex_init(&rtc->lock);
351284
352285 platform_set_drvdata(pdev, rtc);
353286
354
- rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
287
+ rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
355288 if (IS_ERR(rtc->rtc_dev))
356289 return PTR_ERR(rtc->rtc_dev);
357290
358
- ret = request_threaded_irq(rtc->irq, NULL,
359
- mtk_rtc_irq_handler_thread,
360
- IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
361
- "mt6397-rtc", rtc);
291
+ ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
292
+ mtk_rtc_irq_handler_thread,
293
+ IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
294
+ "mt6397-rtc", rtc);
295
+
362296 if (ret) {
363297 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
364298 rtc->irq, ret);
....@@ -369,26 +303,7 @@
369303
370304 rtc->rtc_dev->ops = &mtk_rtc_ops;
371305
372
- ret = rtc_register_device(rtc->rtc_dev);
373
- if (ret) {
374
- dev_err(&pdev->dev, "register rtc device failed\n");
375
- goto out_free_irq;
376
- }
377
-
378
- return 0;
379
-
380
-out_free_irq:
381
- free_irq(rtc->irq, rtc);
382
- return ret;
383
-}
384
-
385
-static int mtk_rtc_remove(struct platform_device *pdev)
386
-{
387
- struct mt6397_rtc *rtc = platform_get_drvdata(pdev);
388
-
389
- free_irq(rtc->irq, rtc);
390
-
391
- return 0;
306
+ return rtc_register_device(rtc->rtc_dev);
392307 }
393308
394309 #ifdef CONFIG_PM_SLEEP
....@@ -416,8 +331,18 @@
416331 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
417332 mt6397_rtc_resume);
418333
334
+static const struct mtk_rtc_data mt6358_rtc_data = {
335
+ .wrtgr = RTC_WRTGR_MT6358,
336
+};
337
+
338
+static const struct mtk_rtc_data mt6397_rtc_data = {
339
+ .wrtgr = RTC_WRTGR_MT6397,
340
+};
341
+
419342 static const struct of_device_id mt6397_rtc_of_match[] = {
420
- { .compatible = "mediatek,mt6397-rtc", },
343
+ { .compatible = "mediatek,mt6323-rtc", .data = &mt6397_rtc_data },
344
+ { .compatible = "mediatek,mt6358-rtc", .data = &mt6358_rtc_data },
345
+ { .compatible = "mediatek,mt6397-rtc", .data = &mt6397_rtc_data },
421346 { }
422347 };
423348 MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
....@@ -429,7 +354,6 @@
429354 .pm = &mt6397_pm_ops,
430355 },
431356 .probe = mtk_rtc_probe,
432
- .remove = mtk_rtc_remove,
433357 };
434358
435359 module_platform_driver(mtk_rtc_driver);