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| 1 | +// SPDX-License-Identifier: GPL-2.0+ |
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1 | 2 | /* |
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2 | 3 | * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. |
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3 | 4 | * Copyright 2010 Orex Computed Radiography |
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4 | 5 | */ |
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5 | | - |
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6 | | -/* |
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7 | | - * The code contained herein is licensed under the GNU General Public |
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8 | | - * License. You may obtain a copy of the GNU General Public License |
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9 | | - * Version 2 or later at the following locations: |
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10 | | - * |
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11 | | - * http://www.opensource.org/licenses/gpl-license.html |
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12 | | - * http://www.gnu.org/copyleft/gpl.html |
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13 | | - */ |
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14 | | - |
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15 | | -/* based on rtc-mc13892.c */ |
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16 | 6 | |
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17 | 7 | /* |
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18 | 8 | * This driver uses the 47-bit 32 kHz counter in the Freescale DryIce block |
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.. | .. |
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105 | 95 | |
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106 | 96 | /** |
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107 | 97 | * struct imxdi_dev - private imxdi rtc data |
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108 | | - * @pdev: pionter to platform dev |
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| 98 | + * @pdev: pointer to platform dev |
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109 | 99 | * @rtc: pointer to rtc struct |
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110 | 100 | * @ioaddr: IO registers pointer |
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111 | 101 | * @clk: input reference clock |
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.. | .. |
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360 | 350 | * the tamper register is locked. We cannot disable the |
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361 | 351 | * tamper detection. The TDCHL can only be reset by a |
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362 | 352 | * DRYICE POR, but we cannot force a DRYICE POR in |
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363 | | - * softwere because we are still in "FAILURE STATE". |
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| 353 | + * software because we are still in "FAILURE STATE". |
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364 | 354 | * We need a DRYICE POR via battery power cycling.... |
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365 | 355 | */ |
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366 | 356 | /* |
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.. | .. |
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552 | 542 | unsigned long now; |
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553 | 543 | |
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554 | 544 | now = readl(imxdi->ioaddr + DTCMR); |
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555 | | - rtc_time_to_tm(now, tm); |
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| 545 | + rtc_time64_to_tm(now, tm); |
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556 | 546 | |
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557 | 547 | return 0; |
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558 | 548 | } |
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.. | .. |
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561 | 551 | * set the seconds portion of dryice time counter and clear the |
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562 | 552 | * fractional part. |
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563 | 553 | */ |
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564 | | -static int dryice_rtc_set_mmss(struct device *dev, unsigned long secs) |
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| 554 | +static int dryice_rtc_set_time(struct device *dev, struct rtc_time *tm) |
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565 | 555 | { |
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566 | 556 | struct imxdi_dev *imxdi = dev_get_drvdata(dev); |
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567 | 557 | u32 dcr, dsr; |
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.. | .. |
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588 | 578 | if (rc != 0) |
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589 | 579 | return rc; |
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590 | 580 | |
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591 | | - rc = di_write_wait(imxdi, secs, DTCMR); |
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| 581 | + rc = di_write_wait(imxdi, rtc_tm_to_time64(tm), DTCMR); |
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592 | 582 | if (rc != 0) |
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593 | 583 | return rc; |
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594 | 584 | |
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.. | .. |
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618 | 608 | u32 dcamr; |
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619 | 609 | |
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620 | 610 | dcamr = readl(imxdi->ioaddr + DCAMR); |
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621 | | - rtc_time_to_tm(dcamr, &alarm->time); |
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| 611 | + rtc_time64_to_tm(dcamr, &alarm->time); |
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622 | 612 | |
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623 | 613 | /* alarm is enabled if the interrupt is enabled */ |
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624 | 614 | alarm->enabled = (readl(imxdi->ioaddr + DIER) & DIER_CAIE) != 0; |
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.. | .. |
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640 | 630 | static int dryice_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
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641 | 631 | { |
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642 | 632 | struct imxdi_dev *imxdi = dev_get_drvdata(dev); |
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643 | | - unsigned long now; |
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644 | | - unsigned long alarm_time; |
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645 | 633 | int rc; |
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646 | 634 | |
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647 | | - rc = rtc_tm_to_time(&alarm->time, &alarm_time); |
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648 | | - if (rc) |
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649 | | - return rc; |
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650 | | - |
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651 | | - /* don't allow setting alarm in the past */ |
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652 | | - now = readl(imxdi->ioaddr + DTCMR); |
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653 | | - if (alarm_time < now) |
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654 | | - return -EINVAL; |
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655 | | - |
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656 | 635 | /* write the new alarm time */ |
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657 | | - rc = di_write_wait(imxdi, (u32)alarm_time, DCAMR); |
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| 636 | + rc = di_write_wait(imxdi, rtc_tm_to_time64(&alarm->time), DCAMR); |
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658 | 637 | if (rc) |
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659 | 638 | return rc; |
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660 | 639 | |
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.. | .. |
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668 | 647 | |
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669 | 648 | static const struct rtc_class_ops dryice_rtc_ops = { |
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670 | 649 | .read_time = dryice_rtc_read_time, |
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671 | | - .set_mmss = dryice_rtc_set_mmss, |
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| 650 | + .set_time = dryice_rtc_set_time, |
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672 | 651 | .alarm_irq_enable = dryice_rtc_alarm_irq_enable, |
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673 | 652 | .read_alarm = dryice_rtc_read_alarm, |
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674 | 653 | .set_alarm = dryice_rtc_set_alarm, |
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.. | .. |
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761 | 740 | */ |
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762 | 741 | static int __init dryice_rtc_probe(struct platform_device *pdev) |
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763 | 742 | { |
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764 | | - struct resource *res; |
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765 | 743 | struct imxdi_dev *imxdi; |
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766 | 744 | int norm_irq, sec_irq; |
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767 | 745 | int rc; |
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.. | .. |
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772 | 750 | |
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773 | 751 | imxdi->pdev = pdev; |
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774 | 752 | |
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775 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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776 | | - imxdi->ioaddr = devm_ioremap_resource(&pdev->dev, res); |
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| 753 | + imxdi->ioaddr = devm_platform_ioremap_resource(pdev, 0); |
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777 | 754 | if (IS_ERR(imxdi->ioaddr)) |
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778 | 755 | return PTR_ERR(imxdi->ioaddr); |
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779 | 756 | |
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.. | .. |
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795 | 772 | INIT_WORK(&imxdi->work, dryice_work); |
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796 | 773 | |
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797 | 774 | mutex_init(&imxdi->write_mutex); |
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| 775 | + |
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| 776 | + imxdi->rtc = devm_rtc_allocate_device(&pdev->dev); |
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| 777 | + if (IS_ERR(imxdi->rtc)) |
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| 778 | + return PTR_ERR(imxdi->rtc); |
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798 | 779 | |
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799 | 780 | imxdi->clk = devm_clk_get(&pdev->dev, NULL); |
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800 | 781 | if (IS_ERR(imxdi->clk)) |
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.. | .. |
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829 | 810 | } |
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830 | 811 | |
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831 | 812 | platform_set_drvdata(pdev, imxdi); |
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832 | | - imxdi->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, |
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833 | | - &dryice_rtc_ops, THIS_MODULE); |
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834 | | - if (IS_ERR(imxdi->rtc)) { |
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835 | | - rc = PTR_ERR(imxdi->rtc); |
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| 813 | + |
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| 814 | + imxdi->rtc->ops = &dryice_rtc_ops; |
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| 815 | + imxdi->rtc->range_max = U32_MAX; |
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| 816 | + |
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| 817 | + rc = rtc_register_device(imxdi->rtc); |
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| 818 | + if (rc) |
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836 | 819 | goto err; |
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837 | | - } |
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838 | 820 | |
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839 | 821 | return 0; |
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840 | 822 | |
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