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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * PIC32 pinctrl driver |
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3 | 4 | * |
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4 | 5 | * Joshua Henderson, <joshua.henderson@microchip.com> |
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5 | 6 | * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. |
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6 | | - * |
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7 | | - * This program is free software; you can distribute it and/or modify it |
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8 | | - * under the terms of the GNU General Public License (Version 2) as |
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9 | | - * published by the Free Software Foundation. |
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10 | | - * |
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11 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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12 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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13 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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14 | | - * for more details. |
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15 | 7 | */ |
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16 | 8 | #include <linux/clk.h> |
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17 | 9 | #include <linux/gpio/driver.h> |
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.. | .. |
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1998 | 1990 | { |
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1999 | 1991 | struct pic32_gpio_bank *bank = gpiochip_get_data(chip); |
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2000 | 1992 | |
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2001 | | - return !!(readl(bank->reg_base + TRIS_REG) & BIT(offset)); |
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| 1993 | + if (readl(bank->reg_base + TRIS_REG) & BIT(offset)) |
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| 1994 | + return GPIO_LINE_DIRECTION_IN; |
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| 1995 | + |
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| 1996 | + return GPIO_LINE_DIRECTION_OUT; |
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2002 | 1997 | } |
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2003 | 1998 | |
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2004 | 1999 | static void pic32_gpio_irq_ack(struct irq_data *data) |
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.. | .. |
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2210 | 2205 | struct pic32_gpio_bank *bank; |
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2211 | 2206 | u32 id; |
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2212 | 2207 | int irq, ret; |
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2213 | | - struct resource *res; |
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| 2208 | + struct gpio_irq_chip *girq; |
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2214 | 2209 | |
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2215 | 2210 | if (of_property_read_u32(np, "microchip,gpio-bank", &id)) { |
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2216 | 2211 | dev_err(&pdev->dev, "microchip,gpio-bank property not found\n"); |
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.. | .. |
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2224 | 2219 | |
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2225 | 2220 | bank = &pic32_gpio_banks[id]; |
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2226 | 2221 | |
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2227 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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2228 | | - bank->reg_base = devm_ioremap_resource(&pdev->dev, res); |
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| 2222 | + bank->reg_base = devm_platform_ioremap_resource(pdev, 0); |
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2229 | 2223 | if (IS_ERR(bank->reg_base)) |
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2230 | 2224 | return PTR_ERR(bank->reg_base); |
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2231 | 2225 | |
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2232 | 2226 | irq = platform_get_irq(pdev, 0); |
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2233 | | - if (irq < 0) { |
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2234 | | - dev_err(&pdev->dev, "irq get failed\n"); |
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| 2227 | + if (irq < 0) |
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2235 | 2228 | return irq; |
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2236 | | - } |
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2237 | 2229 | |
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2238 | 2230 | bank->clk = devm_clk_get(&pdev->dev, NULL); |
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2239 | 2231 | if (IS_ERR(bank->clk)) { |
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.. | .. |
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2250 | 2242 | |
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2251 | 2243 | bank->gpio_chip.parent = &pdev->dev; |
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2252 | 2244 | bank->gpio_chip.of_node = np; |
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| 2245 | + girq = &bank->gpio_chip.irq; |
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| 2246 | + girq->chip = &bank->irq_chip; |
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| 2247 | + girq->parent_handler = pic32_gpio_irq_handler; |
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| 2248 | + girq->num_parents = 1; |
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| 2249 | + girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents), |
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| 2250 | + GFP_KERNEL); |
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| 2251 | + if (!girq->parents) |
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| 2252 | + return -ENOMEM; |
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| 2253 | + girq->default_type = IRQ_TYPE_NONE; |
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| 2254 | + girq->handler = handle_level_irq; |
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| 2255 | + girq->parents[0] = irq; |
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2253 | 2256 | ret = gpiochip_add_data(&bank->gpio_chip, bank); |
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2254 | 2257 | if (ret < 0) { |
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2255 | 2258 | dev_err(&pdev->dev, "Failed to add GPIO chip %u: %d\n", |
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2256 | 2259 | id, ret); |
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2257 | 2260 | return ret; |
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2258 | 2261 | } |
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2259 | | - |
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2260 | | - ret = gpiochip_irqchip_add(&bank->gpio_chip, &bank->irq_chip, |
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2261 | | - 0, handle_level_irq, IRQ_TYPE_NONE); |
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2262 | | - if (ret < 0) { |
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2263 | | - dev_err(&pdev->dev, "Failed to add IRQ chip %u: %d\n", |
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2264 | | - id, ret); |
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2265 | | - gpiochip_remove(&bank->gpio_chip); |
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2266 | | - return ret; |
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2267 | | - } |
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2268 | | - |
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2269 | | - gpiochip_set_chained_irqchip(&bank->gpio_chip, &bank->irq_chip, |
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2270 | | - irq, pic32_gpio_irq_handler); |
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2271 | | - |
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2272 | 2262 | return 0; |
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2273 | 2263 | } |
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2274 | 2264 | |
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