add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/phy/phy-xgene.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * AppliedMicro X-Gene Multi-purpose PHY driver
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  *
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@@ -5,19 +6,6 @@
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  * Author: Loc Ho <lho@apm.com>
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  *         Tuan Phan <tphan@apm.com>
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  *         Suman Tripathi <stripathi@apm.com>
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- *
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- * This program is free software; you can redistribute  it and/or modify it
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- * under  the terms of  the GNU General  Public License as published by the
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- * Free Software Foundation;  either version 2 of the  License, or (at your
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- * option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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  *
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  * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.
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  * The first PLL clock macro is used for internal reference clock. The second
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@@ -1354,7 +1342,7 @@
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 static void xgene_phy_force_lat_summer_cal(struct xgene_phy_ctx *ctx, int lane)
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 {
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 	int i;
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-	struct {
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+	static const struct {
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 		u32 reg;
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 		u32 val;
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 	} serdes_reg[] = {
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@@ -1627,7 +1615,7 @@
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 	if (args->args_count <= 0)
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 		return ERR_PTR(-EINVAL);
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-	if (args->args[0] < MODE_SATA || args->args[0] >= MODE_MAX)
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+	if (args->args[0] >= MODE_MAX)
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 		return ERR_PTR(-EINVAL);
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 	ctx->mode = args->args[0];