hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/pci/ecam.c
....@@ -26,7 +26,7 @@
2626 */
2727 struct pci_config_window *pci_ecam_create(struct device *dev,
2828 struct resource *cfgres, struct resource *busr,
29
- struct pci_ecam_ops *ops)
29
+ const struct pci_ecam_ops *ops)
3030 {
3131 struct pci_config_window *cfg;
3232 unsigned int bus_range, bus_range_max, bsz;
....@@ -101,6 +101,7 @@
101101 pci_ecam_free(cfg);
102102 return ERR_PTR(err);
103103 }
104
+EXPORT_SYMBOL_GPL(pci_ecam_create);
104105
105106 void pci_ecam_free(struct pci_config_window *cfg)
106107 {
....@@ -121,6 +122,7 @@
121122 release_resource(&cfg->res);
122123 kfree(cfg);
123124 }
125
+EXPORT_SYMBOL_GPL(pci_ecam_free);
124126
125127 /*
126128 * Function to implement the pci_ops ->map_bus method
....@@ -143,9 +145,10 @@
143145 base = cfg->win + (busn << cfg->ops->bus_shift);
144146 return base + (devfn << devfn_shift) + where;
145147 }
148
+EXPORT_SYMBOL_GPL(pci_ecam_map_bus);
146149
147150 /* ECAM ops */
148
-struct pci_ecam_ops pci_generic_ecam_ops = {
151
+const struct pci_ecam_ops pci_generic_ecam_ops = {
149152 .bus_shift = 20,
150153 .pci_ops = {
151154 .map_bus = pci_ecam_map_bus,
....@@ -153,10 +156,11 @@
153156 .write = pci_generic_config_write,
154157 }
155158 };
159
+EXPORT_SYMBOL_GPL(pci_generic_ecam_ops);
156160
157161 #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
158162 /* ECAM ops for 32-bit access only (non-compliant) */
159
-struct pci_ecam_ops pci_32b_ops = {
163
+const struct pci_ecam_ops pci_32b_ops = {
160164 .bus_shift = 20,
161165 .pci_ops = {
162166 .map_bus = pci_ecam_map_bus,
....@@ -164,4 +168,14 @@
164168 .write = pci_generic_config_write32,
165169 }
166170 };
171
+
172
+/* ECAM ops for 32-bit read only (non-compliant) */
173
+const struct pci_ecam_ops pci_32b_read_ops = {
174
+ .bus_shift = 20,
175
+ .pci_ops = {
176
+ .map_bus = pci_ecam_map_bus,
177
+ .read = pci_generic_config_read32,
178
+ .write = pci_generic_config_write,
179
+ }
180
+};
167181 #endif