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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/pci/controller/pci-ftpci100.c
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@@ -34,12 +34,12 @@
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  * Special configuration registers directly in the first few words
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  * in I/O space.
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  */
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-#define PCI_IOSIZE	0x00
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-#define PCI_PROT	0x04 /* AHB protection */
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-#define PCI_CTRL	0x08 /* PCI control signal */
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-#define PCI_SOFTRST	0x10 /* Soft reset counter and response error enable */
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-#define PCI_CONFIG	0x28 /* PCI configuration command register */
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-#define PCI_DATA	0x2C
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+#define FTPCI_IOSIZE	0x00
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+#define FTPCI_PROT	0x04 /* AHB protection */
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+#define FTPCI_CTRL	0x08 /* PCI control signal */
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+#define FTPCI_SOFTRST	0x10 /* Soft reset counter and response error enable */
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+#define FTPCI_CONFIG	0x28 /* PCI configuration command register */
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+#define FTPCI_DATA	0x2C
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 #define FARADAY_PCI_STATUS_CMD		0x04 /* Status and command */
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 #define FARADAY_PCI_PMC			0x40 /* Power management control */
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@@ -195,9 +195,9 @@
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 			PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
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 			PCI_CONF_WHERE(config) |
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 			PCI_CONF_ENABLE,
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-			p->base + PCI_CONFIG);
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+			p->base + FTPCI_CONFIG);
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-	*value = readl(p->base + PCI_DATA);
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+	*value = readl(p->base + FTPCI_DATA);
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 	if (size == 1)
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 		*value = (*value >> (8 * (config & 3))) & 0xFF;
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@@ -230,17 +230,17 @@
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 			PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
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 			PCI_CONF_WHERE(config) |
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 			PCI_CONF_ENABLE,
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-			p->base + PCI_CONFIG);
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+			p->base + FTPCI_CONFIG);
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 	switch (size) {
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 	case 4:
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-		writel(value, p->base + PCI_DATA);
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+		writel(value, p->base + FTPCI_DATA);
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 		break;
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 	case 2:
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-		writew(value, p->base + PCI_DATA + (config & 3));
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+		writew(value, p->base + FTPCI_DATA + (config & 3));
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 		break;
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 	case 1:
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-		writeb(value, p->base + PCI_DATA + (config & 3));
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+		writeb(value, p->base + FTPCI_DATA + (config & 3));
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 		break;
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 	default:
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 		ret = PCIBIOS_BAD_REGISTER_NUMBER;
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@@ -375,12 +375,11 @@
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 	return 0;
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 }
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-static int faraday_pci_parse_map_dma_ranges(struct faraday_pci *p,
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-					    struct device_node *np)
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+static int faraday_pci_parse_map_dma_ranges(struct faraday_pci *p)
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 {
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-	struct of_pci_range range;
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-	struct of_pci_range_parser parser;
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 	struct device *dev = p->dev;
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+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(p);
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+	struct resource_entry *entry;
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 	u32 confreg[3] = {
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 		FARADAY_PCI_MEM1_BASE_SIZE,
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 		FARADAY_PCI_MEM2_BASE_SIZE,
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@@ -389,19 +388,13 @@
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 	int i = 0;
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 	u32 val;
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-	if (of_pci_dma_range_parser_init(&parser, np)) {
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-		dev_err(dev, "missing dma-ranges property\n");
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-		return -EINVAL;
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-	}
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-
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-	/*
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-	 * Get the dma-ranges from the device tree
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-	 */
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-	for_each_of_pci_range(&parser, &range) {
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-		u64 end = range.pci_addr + range.size - 1;
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+	resource_list_for_each_entry(entry, &bridge->dma_ranges) {
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+		u64 pci_addr = entry->res->start - entry->offset;
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+		u64 end = entry->res->end - entry->offset;
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 		int ret;
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-		ret = faraday_res_to_memcfg(range.pci_addr, range.size, &val);
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+		ret = faraday_res_to_memcfg(pci_addr,
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+					    resource_size(entry->res), &val);
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 		if (ret) {
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 			dev_err(dev,
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 				"DMA range %d: illegal MEM resource size\n", i);
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@@ -409,7 +402,7 @@
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 		}
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 		dev_info(dev, "DMA MEM%d BASE: 0x%016llx -> 0x%016llx config %08x\n",
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-			 i + 1, range.pci_addr, end, val);
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+			 i + 1, pci_addr, end, val);
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 		if (i <= 2) {
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 			faraday_raw_pci_write_config(p, 0, 0, confreg[i],
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 						     4, val);
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@@ -429,11 +422,8 @@
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 	struct device *dev = &pdev->dev;
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 	const struct faraday_pci_variant *variant =
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 		of_device_get_match_data(dev);
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-	struct resource *regs;
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-	resource_size_t io_base;
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 	struct resource_entry *win;
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 	struct faraday_pci *p;
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-	struct resource *mem;
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 	struct resource *io;
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 	struct pci_host_bridge *host;
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 	struct clk *clk;
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@@ -441,92 +431,47 @@
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 	unsigned char cur_bus_speed = PCI_SPEED_33MHz;
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 	int ret;
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 	u32 val;
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-	LIST_HEAD(res);
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 	host = devm_pci_alloc_host_bridge(dev, sizeof(*p));
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 	if (!host)
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 		return -ENOMEM;
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-	host->dev.parent = dev;
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 	host->ops = &faraday_pci_ops;
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-	host->busnr = 0;
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-	host->msi = NULL;
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-	host->map_irq = of_irq_parse_and_map_pci;
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-	host->swizzle_irq = pci_common_swizzle;
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 	p = pci_host_bridge_priv(host);
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 	host->sysdata = p;
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 	p->dev = dev;
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 	/* Retrieve and enable optional clocks */
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-	clk = devm_clk_get(dev, "PCLK");
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+	clk = devm_clk_get_enabled(dev, "PCLK");
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 	if (IS_ERR(clk))
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 		return PTR_ERR(clk);
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-	ret = clk_prepare_enable(clk);
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-	if (ret) {
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-		dev_err(dev, "could not prepare PCLK\n");
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-		return ret;
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-	}
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-	p->bus_clk = devm_clk_get(dev, "PCICLK");
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+	p->bus_clk = devm_clk_get_enabled(dev, "PCICLK");
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 	if (IS_ERR(p->bus_clk))
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 		return PTR_ERR(p->bus_clk);
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-	ret = clk_prepare_enable(p->bus_clk);
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-	if (ret) {
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-		dev_err(dev, "could not prepare PCICLK\n");
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-		return ret;
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-	}
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-	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	p->base = devm_ioremap_resource(dev, regs);
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+	p->base = devm_platform_ioremap_resource(pdev, 0);
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 	if (IS_ERR(p->base))
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 		return PTR_ERR(p->base);
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-	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
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-						    &res, &io_base);
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-	if (ret)
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-		return ret;
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-
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-	ret = devm_request_pci_bus_resources(dev, &res);
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-	if (ret)
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-		return ret;
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-
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-	/* Get the I/O and memory ranges from DT */
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-	resource_list_for_each_entry(win, &res) {
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-		switch (resource_type(win->res)) {
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-		case IORESOURCE_IO:
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-			io = win->res;
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-			io->name = "Gemini PCI I/O";
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-			if (!faraday_res_to_memcfg(io->start - win->offset,
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-						   resource_size(io), &val)) {
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-				/* setup I/O space size */
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-				writel(val, p->base + PCI_IOSIZE);
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-			} else {
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-				dev_err(dev, "illegal IO mem size\n");
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-				return -EINVAL;
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-			}
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-			ret = devm_pci_remap_iospace(dev, io, io_base);
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-			if (ret) {
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-				dev_warn(dev, "error %d: failed to map resource %pR\n",
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-					 ret, io);
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-				continue;
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-			}
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-			break;
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-		case IORESOURCE_MEM:
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-			mem = win->res;
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-			mem->name = "Gemini PCI MEM";
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-			break;
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-		case IORESOURCE_BUS:
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-			break;
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-		default:
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-			break;
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+	win = resource_list_first_type(&host->windows, IORESOURCE_IO);
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+	if (win) {
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+		io = win->res;
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+		if (!faraday_res_to_memcfg(io->start - win->offset,
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+					   resource_size(io), &val)) {
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+			/* setup I/O space size */
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+			writel(val, p->base + FTPCI_IOSIZE);
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+		} else {
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+			dev_err(dev, "illegal IO mem size\n");
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+			return -EINVAL;
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 		}
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 	}
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 	/* Setup hostbridge */
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-	val = readl(p->base + PCI_CTRL);
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+	val = readl(p->base + FTPCI_CTRL);
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 	val |= PCI_COMMAND_IO;
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 	val |= PCI_COMMAND_MEMORY;
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 	val |= PCI_COMMAND_MASTER;
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-	writel(val, p->base + PCI_CTRL);
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+	writel(val, p->base + FTPCI_CTRL);
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 	/* Mask and clear all interrupts */
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 	faraday_raw_pci_write_config(p, 0, 0, FARADAY_PCI_CTRL2 + 2, 2, 0xF000);
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 	if (variant->cascaded_irq) {
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@@ -565,11 +510,10 @@
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 			cur_bus_speed = PCI_SPEED_66MHz;
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 	}
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-	ret = faraday_pci_parse_map_dma_ranges(p, dev->of_node);
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+	ret = faraday_pci_parse_map_dma_ranges(p);
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 	if (ret)
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 		return ret;
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-	list_splice_init(&res, &host->windows);
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 	ret = pci_scan_root_bus_bridge(host);
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 	if (ret) {
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 		dev_err(dev, "failed to scan host: %d\n", ret);
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@@ -581,7 +525,6 @@
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 	pci_bus_assign_resources(p->bus);
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 	pci_bus_add_devices(p->bus);
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-	pci_free_resource_list(&res);
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 	return 0;
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 }