forked from ~ljy/RK356X_SDK_RELEASE

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hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/drivers/pci/ats.c
....@@ -31,6 +31,22 @@
3131 }
3232 
3333 /**
34
+ * pci_ats_supported - check if the device can use ATS
35
+ * @dev: the PCI device
36
+ *
37
+ * Returns true if the device supports ATS and is allowed to use it, false
38
+ * otherwise.
39
+ */
40
+bool pci_ats_supported(struct pci_dev *dev)
41
+{
42
+	if (!dev->ats_cap)
43
+		return false;
44
+
45
+	return (dev->untrusted == 0);
46
+}
47
+EXPORT_SYMBOL_GPL(pci_ats_supported);
48
+
49
+/**
3450  * pci_enable_ats - enable the ATS capability
3551  * @dev: the PCI device
3652  * @ps: the IOMMU page shift
....@@ -42,7 +58,7 @@
4258 	u16 ctrl;
4359 	struct pci_dev *pdev;
4460 
45
-	if (!dev->ats_cap)
61
+	if (!pci_ats_supported(dev))
4662 		return -EINVAL;
4763 
4864 	if (WARN_ON(dev->ats_enabled))
....@@ -60,8 +76,6 @@
6076 		pdev = pci_physfn(dev);
6177 		if (pdev->ats_stu != ps)
6278 			return -EINVAL;
63
-
64
-		atomic_inc(&pdev->ats_ref_cnt);  /* count enabled VFs */
6579 	} else {
6680 		dev->ats_stu = ps;
6781 		ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
....@@ -79,19 +93,10 @@
7993  */
8094 void pci_disable_ats(struct pci_dev *dev)
8195 {
82
-	struct pci_dev *pdev;
8396 	u16 ctrl;
8497 
8598 	if (WARN_ON(!dev->ats_enabled))
8699 		return;
87
-
88
-	if (atomic_read(&dev->ats_ref_cnt))
89
-		return;		/* VFs still enabled */
90
-
91
-	if (dev->is_virtfn) {
92
-		pdev = pci_physfn(dev);
93
-		atomic_dec(&pdev->ats_ref_cnt);
94
-	}
95100 
96101 	pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, &ctrl);
97102 	ctrl &= ~PCI_ATS_CTRL_ENABLE;
....@@ -113,7 +118,6 @@
113118 		ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
114119 	pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
115120 }
116
-EXPORT_SYMBOL_GPL(pci_restore_ats_state);
117121 
118122 /**
119123  * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
....@@ -140,12 +144,52 @@
140144 	pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CAP, &cap);
141145 	return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) : PCI_ATS_MAX_QDEP;
142146 }
143
-EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
147
+
148
+/**
149
+ * pci_ats_page_aligned - Return Page Aligned Request bit status.
150
+ * @pdev: the PCI device
151
+ *
152
+ * Returns 1, if the Untranslated Addresses generated by the device
153
+ * are always aligned or 0 otherwise.
154
+ *
155
+ * Per PCIe spec r4.0, sec 10.5.1.2, if the Page Aligned Request bit
156
+ * is set, it indicates the Untranslated Addresses generated by the
157
+ * device are always aligned to a 4096 byte boundary.
158
+ */
159
+int pci_ats_page_aligned(struct pci_dev *pdev)
160
+{
161
+	u16 cap;
162
+
163
+	if (!pdev->ats_cap)
164
+		return 0;
165
+
166
+	pci_read_config_word(pdev, pdev->ats_cap + PCI_ATS_CAP, &cap);
167
+
168
+	if (cap & PCI_ATS_CAP_PAGE_ALIGNED)
169
+		return 1;
170
+
171
+	return 0;
172
+}
144173 
145174 #ifdef CONFIG_PCI_PRI
175
+void pci_pri_init(struct pci_dev *pdev)
176
+{
177
+	u16 status;
178
+
179
+	pdev->pri_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
180
+
181
+	if (!pdev->pri_cap)
182
+		return;
183
+
184
+	pci_read_config_word(pdev, pdev->pri_cap + PCI_PRI_STATUS, &status);
185
+	if (status & PCI_PRI_STATUS_PASID)
186
+		pdev->pasid_required = 1;
187
+}
188
+
146189 /**
147190  * pci_enable_pri - Enable PRI capability
148
- * @ pdev: PCI device structure
191
+ * @pdev: PCI device structure
192
+ * @reqs: outstanding requests
149193  *
150194  * Returns 0 on success, negative value on error
151195  */
....@@ -153,32 +197,41 @@
153197 {
154198 	u16 control, status;
155199 	u32 max_requests;
156
-	int pos;
200
+	int pri = pdev->pri_cap;
201
+
202
+	/*
203
+	 * VFs must not implement the PRI Capability.  If their PF
204
+	 * implements PRI, it is shared by the VFs, so if the PF PRI is
205
+	 * enabled, it is also enabled for the VF.
206
+	 */
207
+	if (pdev->is_virtfn) {
208
+		if (pci_physfn(pdev)->pri_enabled)
209
+			return 0;
210
+		return -EINVAL;
211
+	}
157212 
158213 	if (WARN_ON(pdev->pri_enabled))
159214 		return -EBUSY;
160215 
161
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
162
-	if (!pos)
216
+	if (!pri)
163217 		return -EINVAL;
164218 
165
-	pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
219
+	pci_read_config_word(pdev, pri + PCI_PRI_STATUS, &status);
166220 	if (!(status & PCI_PRI_STATUS_STOPPED))
167221 		return -EBUSY;
168222 
169
-	pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
223
+	pci_read_config_dword(pdev, pri + PCI_PRI_MAX_REQ, &max_requests);
170224 	reqs = min(max_requests, reqs);
171225 	pdev->pri_reqs_alloc = reqs;
172
-	pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
226
+	pci_write_config_dword(pdev, pri + PCI_PRI_ALLOC_REQ, reqs);
173227 
174228 	control = PCI_PRI_CTRL_ENABLE;
175
-	pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
229
+	pci_write_config_word(pdev, pri + PCI_PRI_CTRL, control);
176230 
177231 	pdev->pri_enabled = 1;
178232 
179233 	return 0;
180234 }
181
-EXPORT_SYMBOL_GPL(pci_enable_pri);
182235 
183236 /**
184237  * pci_disable_pri - Disable PRI capability
....@@ -189,18 +242,21 @@
189242 void pci_disable_pri(struct pci_dev *pdev)
190243 {
191244 	u16 control;
192
-	int pos;
245
+	int pri = pdev->pri_cap;
246
+
247
+	/* VFs share the PF PRI */
248
+	if (pdev->is_virtfn)
249
+		return;
193250 
194251 	if (WARN_ON(!pdev->pri_enabled))
195252 		return;
196253 
197
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
198
-	if (!pos)
254
+	if (!pri)
199255 		return;
200256 
201
-	pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
257
+	pci_read_config_word(pdev, pri + PCI_PRI_CTRL, &control);
202258 	control &= ~PCI_PRI_CTRL_ENABLE;
203
-	pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
259
+	pci_write_config_word(pdev, pri + PCI_PRI_CTRL, control);
204260 
205261 	pdev->pri_enabled = 0;
206262 }
....@@ -214,19 +270,20 @@
214270 {
215271 	u16 control = PCI_PRI_CTRL_ENABLE;
216272 	u32 reqs = pdev->pri_reqs_alloc;
217
-	int pos;
273
+	int pri = pdev->pri_cap;
274
+
275
+	if (pdev->is_virtfn)
276
+		return;
218277 
219278 	if (!pdev->pri_enabled)
220279 		return;
221280 
222
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
223
-	if (!pos)
281
+	if (!pri)
224282 		return;
225283 
226
-	pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
227
-	pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
284
+	pci_write_config_dword(pdev, pri + PCI_PRI_ALLOC_REQ, reqs);
285
+	pci_write_config_word(pdev, pri + PCI_PRI_CTRL, control);
228286 }
229
-EXPORT_SYMBOL_GPL(pci_restore_pri_state);
230287 
231288 /**
232289  * pci_reset_pri - Resets device's PRI state
....@@ -238,24 +295,60 @@
238295 int pci_reset_pri(struct pci_dev *pdev)
239296 {
240297 	u16 control;
241
-	int pos;
298
+	int pri = pdev->pri_cap;
299
+
300
+	if (pdev->is_virtfn)
301
+		return 0;
242302 
243303 	if (WARN_ON(pdev->pri_enabled))
244304 		return -EBUSY;
245305 
246
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
247
-	if (!pos)
306
+	if (!pri)
248307 		return -EINVAL;
249308 
250309 	control = PCI_PRI_CTRL_RESET;
251
-	pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
310
+	pci_write_config_word(pdev, pri + PCI_PRI_CTRL, control);
252311 
253312 	return 0;
254313 }
255
-EXPORT_SYMBOL_GPL(pci_reset_pri);
314
+
315
+/**
316
+ * pci_prg_resp_pasid_required - Return PRG Response PASID Required bit
317
+ *				 status.
318
+ * @pdev: PCI device structure
319
+ *
320
+ * Returns 1 if PASID is required in PRG Response Message, 0 otherwise.
321
+ */
322
+int pci_prg_resp_pasid_required(struct pci_dev *pdev)
323
+{
324
+	if (pdev->is_virtfn)
325
+		pdev = pci_physfn(pdev);
326
+
327
+	return pdev->pasid_required;
328
+}
329
+
330
+/**
331
+ * pci_pri_supported - Check if PRI is supported.
332
+ * @pdev: PCI device structure
333
+ *
334
+ * Returns true if PRI capability is present, false otherwise.
335
+ */
336
+bool pci_pri_supported(struct pci_dev *pdev)
337
+{
338
+	/* VFs share the PF PRI */
339
+	if (pci_physfn(pdev)->pri_cap)
340
+		return true;
341
+	return false;
342
+}
343
+EXPORT_SYMBOL_GPL(pci_pri_supported);
256344 #endif /* CONFIG_PCI_PRI */
257345 
258346 #ifdef CONFIG_PCI_PASID
347
+void pci_pasid_init(struct pci_dev *pdev)
348
+{
349
+	pdev->pasid_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
350
+}
351
+
259352 /**
260353  * pci_enable_pasid - Enable the PASID capability
261354  * @pdev: PCI device structure
....@@ -268,7 +361,17 @@
268361 int pci_enable_pasid(struct pci_dev *pdev, int features)
269362 {
270363 	u16 control, supported;
271
-	int pos;
364
+	int pasid = pdev->pasid_cap;
365
+
366
+	/*
367
+	 * VFs must not implement the PASID Capability, but if a PF
368
+	 * supports PASID, its VFs share the PF PASID configuration.
369
+	 */
370
+	if (pdev->is_virtfn) {
371
+		if (pci_physfn(pdev)->pasid_enabled)
372
+			return 0;
373
+		return -EINVAL;
374
+	}
272375 
273376 	if (WARN_ON(pdev->pasid_enabled))
274377 		return -EBUSY;
....@@ -276,11 +379,10 @@
276379 	if (!pdev->eetlp_prefix_path)
277380 		return -EINVAL;
278381 
279
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
280
-	if (!pos)
382
+	if (!pasid)
281383 		return -EINVAL;
282384 
283
-	pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
385
+	pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);
284386 	supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
285387 
286388 	/* User wants to enable anything unsupported? */
....@@ -290,7 +392,7 @@
290392 	control = PCI_PASID_CTRL_ENABLE | features;
291393 	pdev->pasid_features = features;
292394 
293
-	pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
395
+	pci_write_config_word(pdev, pasid + PCI_PASID_CTRL, control);
294396 
295397 	pdev->pasid_enabled = 1;
296398 
....@@ -305,16 +407,19 @@
305407 void pci_disable_pasid(struct pci_dev *pdev)
306408 {
307409 	u16 control = 0;
308
-	int pos;
410
+	int pasid = pdev->pasid_cap;
411
+
412
+	/* VFs share the PF PASID configuration */
413
+	if (pdev->is_virtfn)
414
+		return;
309415 
310416 	if (WARN_ON(!pdev->pasid_enabled))
311417 		return;
312418 
313
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
314
-	if (!pos)
419
+	if (!pasid)
315420 		return;
316421 
317
-	pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
422
+	pci_write_config_word(pdev, pasid + PCI_PASID_CTRL, control);
318423 
319424 	pdev->pasid_enabled = 0;
320425 }
....@@ -327,19 +432,20 @@
327432 void pci_restore_pasid_state(struct pci_dev *pdev)
328433 {
329434 	u16 control;
330
-	int pos;
435
+	int pasid = pdev->pasid_cap;
436
+
437
+	if (pdev->is_virtfn)
438
+		return;
331439 
332440 	if (!pdev->pasid_enabled)
333441 		return;
334442 
335
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
336
-	if (!pos)
443
+	if (!pasid)
337444 		return;
338445 
339446 	control = PCI_PASID_CTRL_ENABLE | pdev->pasid_features;
340
-	pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
447
+	pci_write_config_word(pdev, pasid + PCI_PASID_CTRL, control);
341448 }
342
-EXPORT_SYMBOL_GPL(pci_restore_pasid_state);
343449 
344450 /**
345451  * pci_pasid_features - Check which PASID features are supported
....@@ -354,13 +460,16 @@
354460 int pci_pasid_features(struct pci_dev *pdev)
355461 {
356462 	u16 supported;
357
-	int pos;
463
+	int pasid;
358464 
359
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
360
-	if (!pos)
465
+	if (pdev->is_virtfn)
466
+		pdev = pci_physfn(pdev);
467
+
468
+	pasid = pdev->pasid_cap;
469
+	if (!pasid)
361470 		return -EINVAL;
362471 
363
-	pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
472
+	pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);
364473 
365474 	supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
366475 
....@@ -375,18 +484,21 @@
375484  * @pdev: PCI device structure
376485  *
377486  * Returns negative value when PASID capability is not present.
378
- * Otherwise it returns the numer of supported PASIDs.
487
+ * Otherwise it returns the number of supported PASIDs.
379488  */
380489 int pci_max_pasids(struct pci_dev *pdev)
381490 {
382491 	u16 supported;
383
-	int pos;
492
+	int pasid;
384493 
385
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
386
-	if (!pos)
494
+	if (pdev->is_virtfn)
495
+		pdev = pci_physfn(pdev);
496
+
497
+	pasid = pdev->pasid_cap;
498
+	if (!pasid)
387499 		return -EINVAL;
388500 
389
-	pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
501
+	pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);
390502 
391503 	supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
392504