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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/nvmem/rk628-efuse.c
..
..
@@ -21,7 +21,6 @@
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 #include <linux/platform_device.h>
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 #include <linux/regmap.h>
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 #include <linux/mfd/rk628.h>
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-#include <linux/mfd/rk630.h>
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24
 
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 #define EFUSE_SIZE		64
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26
 
..
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@@ -59,7 +58,6 @@
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 #define EFUSE_REVISION		0x50
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59
 
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 #define RK628_EFUSE_BASE	0xb0000
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-#define RK630_EFUSE_BASE	0x50000
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 #define RK628_MOD		0x00
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 #define RK628_INT_STATUS	0x0018
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 #define RK628_DOUT		0x0020
..
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@@ -77,48 +75,37 @@
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 #define REG_EFUSE_CTRL		0x0000
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 #define REG_EFUSE_DOUT		0x0004
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80
-enum {
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-	RK628_EFUSE,
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-	RK630_EFUSE,
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-};
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-
85
-struct rk6xx_efuse_plat_data {
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-	int device_type;
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-	struct nvmem_config *econfig;
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-};
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-
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 struct rk628_efuse_chip {
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 	struct device *dev;
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 	u32 base;
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 	struct clk *clk;
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 	struct regmap *regmap;
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-	struct regmap *cru;
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 	struct gpio_desc *avdd_gpio;
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 };
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-static int rk628_read(struct rk628_efuse_chip *efuse, u32 reg)
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+static int rk628_read(struct regmap *regmap, u32 reg)
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 {
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 	int ret;
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 	u32 val;
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-	struct regmap *regmap = efuse->regmap;
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+	struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap);
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 	ret = regmap_read(regmap, reg, &val);
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 	if (ret) {
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-		dev_err(efuse->dev, "failed to read reg 0x%x\n", reg);
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+		dev_err(efuse->dev, "rk628-efuse:failed to read reg 0x%x\n", reg);
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 		return ret;
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 	}
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 	return val;
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 }
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100
 
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-static int rk628_write(struct rk628_efuse_chip *efuse, u32 val, u32 reg)
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+static int rk628_write(struct regmap *regmap, u32 val, u32 reg)
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 {
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 	int ret;
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-	struct regmap *regmap = efuse->regmap;
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+	struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap);
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105
 
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 	ret = regmap_write(regmap, reg, val);
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107
 	if (ret)
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-		dev_err(efuse->dev, "failed to write reg 0x%x\n", reg);
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+		dev_err(efuse->dev, "rk628-efuse:failed to write reg 0x%x\n", reg);
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109
 
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 	return ret;
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111
 }
..
..
@@ -127,41 +114,41 @@
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 {
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 	u32 base = efuse->base;
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 	/* enable auto mode */
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-	rk628_write(efuse,
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-		    rk628_read(efuse, base + RK628_MOD) & (~RK628_USER_MODE),
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+	rk628_write(efuse->regmap,
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+		    rk628_read(efuse->regmap, base + RK628_MOD) & (~RK628_USER_MODE),
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 		    base + RK628_MOD);
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120
 
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 	/* setup efuse timing */
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-	rk628_write(efuse, (T_CSB_P_S << 16) | T_CSB_P_L, base + T_CSB_P);
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-	rk628_write(efuse, (T_PGENB_P_S << 16) | T_PGENB_P_L, base + T_PGENB_P);
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-	rk628_write(efuse, (T_LOAD_P_S << 16) | T_LOAD_P_L, base + T_LOAD_P);
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-	rk628_write(efuse, (T_ADDR_P_S << 16) | T_ADDR_P_L, base + T_ADDR_P);
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-	rk628_write(efuse, (T_STROBE_P_S << 16) | T_STROBE_P_L, base + T_STROBE_P);
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-	rk628_write(efuse, (T_CSB_R_S << 16) | T_CSB_R_L, base + T_CSB_R);
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-	rk628_write(efuse, (T_PGENB_R_S << 16) | T_PGENB_R_L, base + T_PGENB_R);
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-	rk628_write(efuse, (T_LOAD_R_S << 16) | T_LOAD_R_L, base + T_LOAD_R);
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-	rk628_write(efuse, (T_ADDR_R_S << 16) | T_ADDR_R_L, base + T_ADDR_R);
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-	rk628_write(efuse, (T_STROBE_R_S << 16) | T_STROBE_R_L, base + T_STROBE_R);
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+	rk628_write(efuse->regmap, (T_CSB_P_S << 16) | T_CSB_P_L, base + T_CSB_P);
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+	rk628_write(efuse->regmap, (T_PGENB_P_S << 16) | T_PGENB_P_L, base + T_PGENB_P);
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+	rk628_write(efuse->regmap, (T_LOAD_P_S << 16) | T_LOAD_P_L, base + T_LOAD_P);
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+	rk628_write(efuse->regmap, (T_ADDR_P_S << 16) | T_ADDR_P_L, base + T_ADDR_P);
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+	rk628_write(efuse->regmap, (T_STROBE_P_S << 16) | T_STROBE_P_L, base + T_STROBE_P);
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+	rk628_write(efuse->regmap, (T_CSB_R_S << 16) | T_CSB_R_L, base + T_CSB_R);
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+	rk628_write(efuse->regmap, (T_PGENB_R_S << 16) | T_PGENB_R_L, base + T_PGENB_R);
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+	rk628_write(efuse->regmap, (T_LOAD_R_S << 16) | T_LOAD_R_L, base + T_LOAD_R);
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+	rk628_write(efuse->regmap, (T_ADDR_R_S << 16) | T_ADDR_R_L, base + T_ADDR_R);
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+	rk628_write(efuse->regmap, (T_STROBE_R_S << 16) | T_STROBE_R_L, base + T_STROBE_R);
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132
 }
146
133
 
147
134
 static void rk628_efuse_timing_deinit(struct rk628_efuse_chip *efuse)
148
135
 {
149
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 	u32 base = efuse->base;
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 	/* disable auto mode */
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-	rk628_write(efuse,
152
-		    rk628_read(efuse, base + RK628_MOD) | RK628_USER_MODE, base + RK628_MOD);
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+	rk628_write(efuse->regmap,
139
+		    rk628_read(efuse->regmap, base + RK628_MOD) | RK628_USER_MODE, base + RK628_MOD);
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140
 
154
141
 	/* clear efuse timing */
155
-	rk628_write(efuse, 0, base + T_CSB_P);
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-	rk628_write(efuse, 0, base + T_PGENB_P);
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-	rk628_write(efuse, 0, base + T_LOAD_P);
158
-	rk628_write(efuse, 0, base + T_ADDR_P);
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-	rk628_write(efuse, 0, base + T_STROBE_P);
160
-	rk628_write(efuse, 0, base + T_CSB_R);
161
-	rk628_write(efuse, 0, base + T_PGENB_R);
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-	rk628_write(efuse, 0, base + T_LOAD_R);
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-	rk628_write(efuse, 0, base + T_ADDR_R);
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-	rk628_write(efuse, 0, base + T_STROBE_R);
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+	rk628_write(efuse->regmap, 0, base + T_CSB_P);
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+	rk628_write(efuse->regmap, 0, base + T_PGENB_P);
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+	rk628_write(efuse->regmap, 0, base + T_LOAD_P);
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+	rk628_write(efuse->regmap, 0, base + T_ADDR_P);
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+	rk628_write(efuse->regmap, 0, base + T_STROBE_P);
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+	rk628_write(efuse->regmap, 0, base + T_CSB_R);
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+	rk628_write(efuse->regmap, 0, base + T_PGENB_R);
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+	rk628_write(efuse->regmap, 0, base + T_LOAD_R);
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+	rk628_write(efuse->regmap, 0, base + T_ADDR_R);
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+	rk628_write(efuse->regmap, 0, base + T_STROBE_R);
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152
 }
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153
 
167
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 static int rk628_efuse_read(void *context, unsigned int offset,
..
..
@@ -171,16 +158,12 @@
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 	unsigned int addr_start, addr_end, addr_offset, addr_len;
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159
 	u32 out_value, status;
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160
 	u8 *buf;
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-	int ret = 0, i = 0;
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+	int ret, i = 0;
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162
 
176
-	if (efuse->clk) {
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-		ret = clk_prepare_enable(efuse->clk);
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-		if (ret < 0) {
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-			dev_err(efuse->dev, "failed to prepare/enable efuse pclk\n");
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-			return ret;
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-		}
182
-	} else {
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-		regmap_write(efuse->cru, CRU_GATE_CON0, PCLK_EFUSE_EN_MASK);
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+	ret = clk_prepare_enable(efuse->clk);
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+	if (ret < 0) {
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+		dev_err(efuse->dev, "failed to prepare/enable efuse pclk\n");
166
+		return ret;
184
167
 	}
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168
 
186
169
 	addr_start = rounddown(offset, RK628_NBYTES) / RK628_NBYTES;
..
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@@ -197,17 +180,17 @@
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 	rk628_efuse_timing_init(efuse);
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181
 
199
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 	while (addr_len--) {
200
-		rk628_write(efuse, RK628_AUTO_RD | RK628_AUTO_ENB |
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+		rk628_write(efuse->regmap, RK628_AUTO_RD | RK628_AUTO_ENB |
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 		       ((addr_start++ & RK628_A_MASK) << RK628_A_SHIFT),
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 		       efuse->base + RK628_AUTO_CTRL);
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186
 		udelay(2);
204
-		status = rk628_read(efuse, efuse->base + RK628_INT_STATUS);
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+		status = rk628_read(efuse->regmap, efuse->base + RK628_INT_STATUS);
205
188
 		if (!(status & RK628_INT_FINISH)) {
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189
 			ret = -EIO;
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190
 			goto err;
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 		}
209
-		out_value = rk628_read(efuse, efuse->base + RK628_DOUT);
210
-		rk628_write(efuse, RK628_INT_FINISH, efuse->base + RK628_INT_STATUS);
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+		out_value = rk628_read(efuse->regmap, efuse->base + RK628_DOUT);
193
+		rk628_write(efuse->regmap, RK628_INT_FINISH, efuse->base + RK628_INT_STATUS);
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194
 
212
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 		memcpy(&buf[i], &out_value, RK628_NBYTES);
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 		i += RK628_NBYTES;
..
..
@@ -217,24 +200,13 @@
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 	rk628_efuse_timing_deinit(efuse);
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 	kfree(buf);
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202
 nomem:
220
-	if (efuse->clk)
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-		clk_disable_unprepare(efuse->clk);
222
-	else
223
-		regmap_write(efuse->cru, CRU_GATE_CON0, PCLK_EFUSE_EN_MASK | PCLK_EFUSE_DISABLE);
203
+	clk_disable_unprepare(efuse->clk);
224
204
 
225
205
 	return ret;
226
206
 }
227
207
 
228
-static struct nvmem_config rk628_econfig = {
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+static struct nvmem_config econfig = {
229
209
 	.name = "rk628-efuse",
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-	.owner = THIS_MODULE,
231
-	.stride = 1,
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-	.word_size = 1,
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-	.read_only = true,
234
-};
235
-
236
-static struct nvmem_config rk630_econfig = {
237
-	.name = "rk630-efuse",
238
210
 	.owner = THIS_MODULE,
239
211
 	.stride = 1,
240
212
 	.word_size = 1,
..
..
@@ -261,57 +233,20 @@
261
233
 	.rd_table = &rk628_efuse_readable_table,
262
234
 };
263
235
 
264
-static const struct regmap_range rk630_efuse_readable_ranges[] = {
265
-	regmap_reg_range(RK630_EFUSE_BASE, RK630_EFUSE_BASE + EFUSE_REVISION),
266
-};
267
-
268
-static const struct regmap_access_table rk630_efuse_readable_table = {
269
-	.yes_ranges     = rk630_efuse_readable_ranges,
270
-	.n_yes_ranges   = ARRAY_SIZE(rk630_efuse_readable_ranges),
271
-};
272
-
273
-const struct regmap_config rk630_efuse_regmap_config = {
274
-	.name = "rk630-efuse",
275
-	.reg_bits = 32,
276
-	.val_bits = 32,
277
-	.reg_stride = 4,
278
-	.max_register = RK630_EFUSE_BASE + EFUSE_REVISION,
279
-	.reg_format_endian = REGMAP_ENDIAN_LITTLE,
280
-	.val_format_endian = REGMAP_ENDIAN_LITTLE,
281
-	.rd_table = &rk630_efuse_readable_table,
282
-};
283
-EXPORT_SYMBOL_GPL(rk630_efuse_regmap_config);
284
-
285
-static const struct rk6xx_efuse_plat_data rk628_efuse_drv_data = {
286
-	.device_type = RK628_EFUSE,
287
-	.econfig = &rk628_econfig,
288
-};
289
-
290
-static const struct rk6xx_efuse_plat_data rk630_efuse_drv_data = {
291
-	.device_type = RK630_EFUSE,
292
-	.econfig = &rk630_econfig,
293
-};
294
-
295
236
 static const struct of_device_id rk628_efuse_match[] = {
296
237
 	{
297
238
 		.compatible = "rockchip,rk628-efuse",
298
-		.data = &rk628_efuse_drv_data
299
-	},
300
-	{
301
-		.compatible = "rockchip,rk630-efuse",
302
-		.data = &rk630_efuse_drv_data
303
239
 	},
304
240
 	{ /* sentinel */ },
305
241
 };
306
242
 MODULE_DEVICE_TABLE(of, rk628_efuse_match);
307
243
 
308
-static int rk628_efuse_probe(struct platform_device *pdev)
244
+static int __init rk628_efuse_probe(struct platform_device *pdev)
309
245
 {
310
246
 	struct nvmem_device *nvmem;
311
247
 	struct rk628_efuse_chip *efuse;
312
248
 	struct device *dev = &pdev->dev;
313
-	struct rk6xx_efuse_plat_data *plat_data;
314
-	const struct of_device_id *match;
249
+	struct rk628 *rk628 = dev_get_drvdata(pdev->dev.parent);
315
250
 	int ret;
316
251
 
317
252
 	efuse = devm_kzalloc(&pdev->dev, sizeof(struct rk628_efuse_chip),
..
..
@@ -319,50 +254,29 @@
319
254
 	if (!efuse)
320
255
 		return -ENOMEM;
321
256
 
322
-	match = of_match_node(rk628_efuse_match, pdev->dev.of_node);
323
-	plat_data = (struct rk6xx_efuse_plat_data *)match->data;
324
-	if (!plat_data)
325
-		return -ENOMEM;
257
+	efuse->regmap = devm_regmap_init_i2c(rk628->client,
258
+					&rk628_efuse_regmap_config);
259
+	if (IS_ERR(efuse->regmap)) {
260
+		ret = PTR_ERR(efuse->regmap);
261
+		dev_err(dev, "failed to allocate register map: %d\n",
262
+				   ret);
263
+		return ret;
264
+	}
326
265
 
327
-	if (plat_data->device_type == RK628_EFUSE) {
328
-		struct rk628 *rk628 = dev_get_drvdata(pdev->dev.parent);
329
-
330
-		efuse->regmap = devm_regmap_init_i2c(rk628->client,
331
-						     &rk628_efuse_regmap_config);
332
-		if (IS_ERR(efuse->regmap)) {
333
-			ret = PTR_ERR(efuse->regmap);
334
-			dev_err(dev, "failed to allocate register map: %d\n",
335
-					   ret);
336
-			return ret;
337
-		}
338
-
339
-		efuse->clk = devm_clk_get(&pdev->dev, "pclk");
340
-		if (IS_ERR(efuse->clk)) {
341
-			dev_err(dev, "failed to get pclk: %ld\n", PTR_ERR(efuse->clk));
342
-			return PTR_ERR(efuse->clk);
343
-		}
344
-
345
-		efuse->base = RK628_EFUSE_BASE;
346
-	} else {
347
-		struct rk630 *rk630 = dev_get_drvdata(pdev->dev.parent);
348
-
349
-		efuse->regmap = rk630->efuse;
350
-		efuse->cru = rk630->cru;
351
-		efuse->base = RK630_EFUSE_BASE;
352
-
353
-		if (!efuse->regmap | !efuse->cru)
354
-			return -ENODEV;
355
-
356
-		efuse->clk = NULL;
266
+	efuse->clk = devm_clk_get(&pdev->dev, "pclk");
267
+	if (IS_ERR(efuse->clk)) {
268
+		dev_err(dev, "failed to get pclk: %ld\n", PTR_ERR(efuse->clk));
269
+		return PTR_ERR(efuse->clk);
357
270
 	}
358
271
 
359
272
 	efuse->avdd_gpio = devm_gpiod_get_optional(dev, "efuse", GPIOD_OUT_LOW);
273
+	efuse->base = RK628_EFUSE_BASE;
360
274
 	efuse->dev = &pdev->dev;
361
-	plat_data->econfig->size = EFUSE_SIZE;
362
-	plat_data->econfig->reg_read = (void *)&rk628_efuse_read;
363
-	plat_data->econfig->priv = efuse;
364
-	plat_data->econfig->dev = efuse->dev;
365
-	nvmem = devm_nvmem_register(dev, plat_data->econfig);
275
+	econfig.size = EFUSE_SIZE;
276
+	econfig.reg_read = (void *)&rk628_efuse_read;
277
+	econfig.priv = efuse;
278
+	econfig.dev = efuse->dev;
279
+	nvmem = devm_nvmem_register(&econfig);
366
280
 	if (IS_ERR(nvmem))
367
281
 		return PTR_ERR(nvmem);
368
282