.. | .. |
---|
4 | 4 | * |
---|
5 | 5 | * GPL LICENSE SUMMARY |
---|
6 | 6 | * |
---|
7 | | - * Copyright (C) 2016 T-Platforms All Rights Reserved. |
---|
| 7 | + * Copyright (C) 2016-2018 T-Platforms JSC All Rights Reserved. |
---|
8 | 8 | * |
---|
9 | 9 | * This program is free software; you can redistribute it and/or modify it |
---|
10 | 10 | * under the terms and conditions of the GNU General Public License, |
---|
.. | .. |
---|
47 | 47 | #include <linux/pci_ids.h> |
---|
48 | 48 | #include <linux/interrupt.h> |
---|
49 | 49 | #include <linux/spinlock.h> |
---|
| 50 | +#include <linux/mutex.h> |
---|
50 | 51 | #include <linux/ntb.h> |
---|
51 | | - |
---|
52 | 52 | |
---|
53 | 53 | /* |
---|
54 | 54 | * Macro is used to create the struct pci_device_id that matches |
---|
.. | .. |
---|
688 | 688 | * @IDT_NTINTMSK_DBELL: Doorbell interrupt mask bit |
---|
689 | 689 | * @IDT_NTINTMSK_SEVENT: Switch Event interrupt mask bit |
---|
690 | 690 | * @IDT_NTINTMSK_TMPSENSOR: Temperature sensor interrupt mask bit |
---|
691 | | - * @IDT_NTINTMSK_ALL: All the useful interrupts mask |
---|
| 691 | + * @IDT_NTINTMSK_ALL: NTB-related interrupts mask |
---|
692 | 692 | */ |
---|
693 | 693 | #define IDT_NTINTMSK_MSG 0x00000001U |
---|
694 | 694 | #define IDT_NTINTMSK_DBELL 0x00000002U |
---|
695 | 695 | #define IDT_NTINTMSK_SEVENT 0x00000008U |
---|
696 | 696 | #define IDT_NTINTMSK_TMPSENSOR 0x00000080U |
---|
697 | 697 | #define IDT_NTINTMSK_ALL \ |
---|
698 | | - (IDT_NTINTMSK_MSG | IDT_NTINTMSK_DBELL | \ |
---|
699 | | - IDT_NTINTMSK_SEVENT | IDT_NTINTMSK_TMPSENSOR) |
---|
| 698 | + (IDT_NTINTMSK_MSG | IDT_NTINTMSK_DBELL | IDT_NTINTMSK_SEVENT) |
---|
700 | 699 | |
---|
701 | 700 | /* |
---|
702 | 701 | * NTGSIGNAL register fields related constants |
---|
.. | .. |
---|
886 | 885 | #define IDT_SWPxMSGCTL_PART_FLD 4 |
---|
887 | 886 | |
---|
888 | 887 | /* |
---|
| 888 | + * TMPCTL register fields related constants |
---|
| 889 | + * @IDT_TMPCTL_LTH_MASK: Low temperature threshold field mask |
---|
| 890 | + * @IDT_TMPCTL_LTH_FLD: Low temperature threshold field offset |
---|
| 891 | + * @IDT_TMPCTL_MTH_MASK: Middle temperature threshold field mask |
---|
| 892 | + * @IDT_TMPCTL_MTH_FLD: Middle temperature threshold field offset |
---|
| 893 | + * @IDT_TMPCTL_HTH_MASK: High temperature threshold field mask |
---|
| 894 | + * @IDT_TMPCTL_HTH_FLD: High temperature threshold field offset |
---|
| 895 | + * @IDT_TMPCTL_PDOWN: Temperature sensor power down |
---|
| 896 | + */ |
---|
| 897 | +#define IDT_TMPCTL_LTH_MASK 0x000000FFU |
---|
| 898 | +#define IDT_TMPCTL_LTH_FLD 0 |
---|
| 899 | +#define IDT_TMPCTL_MTH_MASK 0x0000FF00U |
---|
| 900 | +#define IDT_TMPCTL_MTH_FLD 8 |
---|
| 901 | +#define IDT_TMPCTL_HTH_MASK 0x00FF0000U |
---|
| 902 | +#define IDT_TMPCTL_HTH_FLD 16 |
---|
| 903 | +#define IDT_TMPCTL_PDOWN 0x80000000U |
---|
| 904 | + |
---|
| 905 | +/* |
---|
889 | 906 | * TMPSTS register fields related constants |
---|
890 | 907 | * @IDT_TMPSTS_TEMP_MASK: Current temperature field mask |
---|
891 | 908 | * @IDT_TMPSTS_TEMP_FLD: Current temperature field offset |
---|
| 909 | + * @IDT_TMPSTS_LTEMP_MASK: Lowest temperature field mask |
---|
| 910 | + * @IDT_TMPSTS_LTEMP_FLD: Lowest temperature field offset |
---|
| 911 | + * @IDT_TMPSTS_HTEMP_MASK: Highest temperature field mask |
---|
| 912 | + * @IDT_TMPSTS_HTEMP_FLD: Highest temperature field offset |
---|
892 | 913 | */ |
---|
893 | 914 | #define IDT_TMPSTS_TEMP_MASK 0x000000FFU |
---|
894 | 915 | #define IDT_TMPSTS_TEMP_FLD 0 |
---|
| 916 | +#define IDT_TMPSTS_LTEMP_MASK 0x0000FF00U |
---|
| 917 | +#define IDT_TMPSTS_LTEMP_FLD 8 |
---|
| 918 | +#define IDT_TMPSTS_HTEMP_MASK 0x00FF0000U |
---|
| 919 | +#define IDT_TMPSTS_HTEMP_FLD 16 |
---|
| 920 | + |
---|
| 921 | +/* |
---|
| 922 | + * TMPALARM register fields related constants |
---|
| 923 | + * @IDT_TMPALARM_LTEMP_MASK: Lowest temperature field mask |
---|
| 924 | + * @IDT_TMPALARM_LTEMP_FLD: Lowest temperature field offset |
---|
| 925 | + * @IDT_TMPALARM_HTEMP_MASK: Highest temperature field mask |
---|
| 926 | + * @IDT_TMPALARM_HTEMP_FLD: Highest temperature field offset |
---|
| 927 | + * @IDT_TMPALARM_IRQ_MASK: Alarm IRQ status mask |
---|
| 928 | + */ |
---|
| 929 | +#define IDT_TMPALARM_LTEMP_MASK 0x0000FF00U |
---|
| 930 | +#define IDT_TMPALARM_LTEMP_FLD 8 |
---|
| 931 | +#define IDT_TMPALARM_HTEMP_MASK 0x00FF0000U |
---|
| 932 | +#define IDT_TMPALARM_HTEMP_FLD 16 |
---|
| 933 | +#define IDT_TMPALARM_IRQ_MASK 0x3F000000U |
---|
| 934 | + |
---|
| 935 | +/* |
---|
| 936 | + * TMPADJ register fields related constants |
---|
| 937 | + * @IDT_TMPADJ_OFFSET_MASK: Temperature value offset field mask |
---|
| 938 | + * @IDT_TMPADJ_OFFSET_FLD: Temperature value offset field offset |
---|
| 939 | + */ |
---|
| 940 | +#define IDT_TMPADJ_OFFSET_MASK 0x000000FFU |
---|
| 941 | +#define IDT_TMPADJ_OFFSET_FLD 0 |
---|
895 | 942 | |
---|
896 | 943 | /* |
---|
897 | 944 | * Helper macro to get/set the corresponding field value |
---|
.. | .. |
---|
949 | 996 | #define IDT_PCIE_REGSIZE 4 |
---|
950 | 997 | #define IDT_TRANS_ALIGN 4 |
---|
951 | 998 | #define IDT_DIR_SIZE_ALIGN 1 |
---|
| 999 | + |
---|
| 1000 | +/* |
---|
| 1001 | + * IDT PCIe-switch temperature sensor value limits |
---|
| 1002 | + * @IDT_TEMP_MIN_MDEG: Minimal integer value of temperature |
---|
| 1003 | + * @IDT_TEMP_MAX_MDEG: Maximal integer value of temperature |
---|
| 1004 | + * @IDT_TEMP_MIN_OFFSET:Minimal integer value of temperature offset |
---|
| 1005 | + * @IDT_TEMP_MAX_OFFSET:Maximal integer value of temperature offset |
---|
| 1006 | + */ |
---|
| 1007 | +#define IDT_TEMP_MIN_MDEG 0 |
---|
| 1008 | +#define IDT_TEMP_MAX_MDEG 127500 |
---|
| 1009 | +#define IDT_TEMP_MIN_OFFSET -64000 |
---|
| 1010 | +#define IDT_TEMP_MAX_OFFSET 63500 |
---|
| 1011 | + |
---|
| 1012 | +/* |
---|
| 1013 | + * Temperature sensor values enumeration |
---|
| 1014 | + * @IDT_TEMP_CUR: Current temperature |
---|
| 1015 | + * @IDT_TEMP_LOW: Lowest historical temperature |
---|
| 1016 | + * @IDT_TEMP_HIGH: Highest historical temperature |
---|
| 1017 | + * @IDT_TEMP_OFFSET: Current temperature offset |
---|
| 1018 | + */ |
---|
| 1019 | +enum idt_temp_val { |
---|
| 1020 | + IDT_TEMP_CUR, |
---|
| 1021 | + IDT_TEMP_LOW, |
---|
| 1022 | + IDT_TEMP_HIGH, |
---|
| 1023 | + IDT_TEMP_OFFSET |
---|
| 1024 | +}; |
---|
952 | 1025 | |
---|
953 | 1026 | /* |
---|
954 | 1027 | * IDT Memory Windows type. Depending on the device settings, IDT supports |
---|
.. | .. |
---|
1044 | 1117 | * @msg_mask_lock: Message mask register lock |
---|
1045 | 1118 | * @gasa_lock: GASA registers access lock |
---|
1046 | 1119 | * |
---|
| 1120 | + * @hwmon_mtx: Temperature sensor interface update mutex |
---|
| 1121 | + * |
---|
1047 | 1122 | * @dbgfs_info: DebugFS info node |
---|
1048 | 1123 | */ |
---|
1049 | 1124 | struct idt_ntb_dev { |
---|
.. | .. |
---|
1071 | 1146 | spinlock_t msg_mask_lock; |
---|
1072 | 1147 | spinlock_t gasa_lock; |
---|
1073 | 1148 | |
---|
| 1149 | + struct mutex hwmon_mtx; |
---|
| 1150 | + |
---|
1074 | 1151 | struct dentry *dbgfs_info; |
---|
1075 | 1152 | }; |
---|
1076 | 1153 | #define to_ndev_ntb(__ntb) container_of(__ntb, struct idt_ntb_dev, ntb) |
---|