.. | .. |
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45 | 45 | #define SH_ETH_OFFSET_DEFAULTS \ |
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46 | 46 | [0 ... SH_ETH_MAX_REGISTER_OFFSET - 1] = SH_ETH_OFFSET_INVALID |
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47 | 47 | |
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| 48 | +/* use some intentionally tricky logic here to initialize the whole struct to |
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| 49 | + * 0xffff, but then override certain fields, requiring us to indicate that we |
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| 50 | + * "know" that there are overrides in this structure, and we'll need to disable |
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| 51 | + * that warning from W=1 builds. GCC has supported this option since 4.2.X, but |
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| 52 | + * the macros available to do this only define GCC 8. |
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| 53 | + */ |
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| 54 | +__diag_push(); |
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| 55 | +__diag_ignore(GCC, 8, "-Woverride-init", |
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| 56 | + "logic to initialize all and then override some is OK"); |
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48 | 57 | static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = { |
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49 | 58 | SH_ETH_OFFSET_DEFAULTS, |
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50 | 59 | |
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.. | .. |
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140 | 149 | [RXALCR1] = 0x00ac, |
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141 | 150 | [FWNLCR1] = 0x00b0, |
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142 | 151 | [FWALCR1] = 0x00b4, |
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143 | | -}; |
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144 | | - |
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145 | | -static const u16 sh_eth_offset_fast_rz[SH_ETH_MAX_REGISTER_OFFSET] = { |
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146 | | - SH_ETH_OFFSET_DEFAULTS, |
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147 | | - |
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148 | | - [EDSR] = 0x0000, |
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149 | | - [EDMR] = 0x0400, |
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150 | | - [EDTRR] = 0x0408, |
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151 | | - [EDRRR] = 0x0410, |
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152 | | - [EESR] = 0x0428, |
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153 | | - [EESIPR] = 0x0430, |
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154 | | - [TDLAR] = 0x0010, |
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155 | | - [TDFAR] = 0x0014, |
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156 | | - [TDFXR] = 0x0018, |
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157 | | - [TDFFR] = 0x001c, |
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158 | | - [RDLAR] = 0x0030, |
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159 | | - [RDFAR] = 0x0034, |
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160 | | - [RDFXR] = 0x0038, |
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161 | | - [RDFFR] = 0x003c, |
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162 | | - [TRSCER] = 0x0438, |
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163 | | - [RMFCR] = 0x0440, |
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164 | | - [TFTR] = 0x0448, |
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165 | | - [FDR] = 0x0450, |
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166 | | - [RMCR] = 0x0458, |
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167 | | - [RPADIR] = 0x0460, |
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168 | | - [FCFTR] = 0x0468, |
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169 | | - [CSMR] = 0x04E4, |
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170 | | - |
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171 | | - [ECMR] = 0x0500, |
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172 | | - [RFLR] = 0x0508, |
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173 | | - [ECSR] = 0x0510, |
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174 | | - [ECSIPR] = 0x0518, |
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175 | | - [PIR] = 0x0520, |
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176 | | - [APR] = 0x0554, |
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177 | | - [MPR] = 0x0558, |
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178 | | - [PFTCR] = 0x055c, |
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179 | | - [PFRCR] = 0x0560, |
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180 | | - [TPAUSER] = 0x0564, |
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181 | | - [MAHR] = 0x05c0, |
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182 | | - [MALR] = 0x05c8, |
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183 | | - [CEFCR] = 0x0740, |
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184 | | - [FRECR] = 0x0748, |
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185 | | - [TSFRCR] = 0x0750, |
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186 | | - [TLFRCR] = 0x0758, |
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187 | | - [RFCR] = 0x0760, |
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188 | | - [MAFCR] = 0x0778, |
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189 | | - |
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190 | | - [ARSTR] = 0x0000, |
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191 | | - [TSU_CTRST] = 0x0004, |
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192 | | - [TSU_FWSLC] = 0x0038, |
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193 | | - [TSU_VTAG0] = 0x0058, |
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194 | | - [TSU_ADSBSY] = 0x0060, |
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195 | | - [TSU_TEN] = 0x0064, |
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196 | | - [TSU_POST1] = 0x0070, |
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197 | | - [TSU_POST2] = 0x0074, |
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198 | | - [TSU_POST3] = 0x0078, |
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199 | | - [TSU_POST4] = 0x007c, |
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200 | | - [TSU_ADRH0] = 0x0100, |
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201 | | - |
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202 | | - [TXNLCR0] = 0x0080, |
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203 | | - [TXALCR0] = 0x0084, |
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204 | | - [RXNLCR0] = 0x0088, |
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205 | | - [RXALCR0] = 0x008C, |
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206 | 152 | }; |
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207 | 153 | |
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208 | 154 | static const u16 sh_eth_offset_fast_rcar[SH_ETH_MAX_REGISTER_OFFSET] = { |
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.. | .. |
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395 | 341 | |
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396 | 342 | [TSU_ADRH0] = 0x0100, |
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397 | 343 | }; |
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| 344 | +__diag_pop(); |
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398 | 345 | |
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399 | 346 | static void sh_eth_rcv_snd_disable(struct net_device *ndev); |
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400 | 347 | static struct net_device_stats *sh_eth_get_stats(struct net_device *ndev); |
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.. | .. |
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555 | 502 | sh_eth_write(ndev, 0, RDFFR); |
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556 | 503 | |
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557 | 504 | /* Reset HW CRC register */ |
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558 | | - if (mdp->cd->hw_checksum) |
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| 505 | + if (mdp->cd->csmr) |
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559 | 506 | sh_eth_write(ndev, 0, CSMR); |
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560 | 507 | |
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561 | 508 | /* Select MII mode */ |
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.. | .. |
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568 | 515 | static void sh_eth_set_rate_gether(struct net_device *ndev) |
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569 | 516 | { |
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570 | 517 | struct sh_eth_private *mdp = netdev_priv(ndev); |
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| 518 | + |
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| 519 | + if (WARN_ON(!mdp->cd->gecmr)) |
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| 520 | + return; |
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571 | 521 | |
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572 | 522 | switch (mdp->speed) { |
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573 | 523 | case 10: /* 10BASE */ |
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.. | .. |
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590 | 540 | .chip_reset = sh_eth_chip_reset, |
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591 | 541 | .set_duplex = sh_eth_set_duplex, |
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592 | 542 | |
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593 | | - .register_type = SH_ETH_REG_FAST_RZ, |
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| 543 | + .register_type = SH_ETH_REG_GIGABIT, |
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594 | 544 | |
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595 | 545 | .edtrr_trns = EDTRR_TRNS_GETHER, |
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596 | 546 | .ecsr_value = ECSR_ICD, |
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.. | .. |
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621 | 571 | .no_trimd = 1, |
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622 | 572 | .no_ade = 1, |
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623 | 573 | .xdfar_rw = 1, |
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624 | | - .hw_checksum = 1, |
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| 574 | + .csmr = 1, |
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| 575 | + .rx_csum = 1, |
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625 | 576 | .tsu = 1, |
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626 | 577 | .no_tx_cntrs = 1, |
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627 | 578 | }; |
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.. | .. |
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664 | 615 | .apr = 1, |
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665 | 616 | .mpr = 1, |
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666 | 617 | .tpauser = 1, |
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| 618 | + .gecmr = 1, |
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667 | 619 | .bculr = 1, |
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668 | 620 | .hw_swap = 1, |
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669 | 621 | .rpadir = 1, |
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670 | 622 | .no_trimd = 1, |
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671 | 623 | .no_ade = 1, |
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672 | 624 | .xdfar_rw = 1, |
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673 | | - .hw_checksum = 1, |
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| 625 | + .csmr = 1, |
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| 626 | + .rx_csum = 1, |
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674 | 627 | .tsu = 1, |
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675 | 628 | .select_mii = 1, |
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676 | 629 | .magic = 1, |
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.. | .. |
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788 | 741 | .apr = 1, |
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789 | 742 | .mpr = 1, |
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790 | 743 | .tpauser = 1, |
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| 744 | + .gecmr = 1, |
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791 | 745 | .bculr = 1, |
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792 | 746 | .hw_swap = 1, |
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793 | 747 | .nbst = 1, |
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.. | .. |
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795 | 749 | .no_trimd = 1, |
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796 | 750 | .no_ade = 1, |
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797 | 751 | .xdfar_rw = 1, |
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798 | | - .hw_checksum = 1, |
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| 752 | + .csmr = 1, |
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| 753 | + .rx_csum = 1, |
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799 | 754 | .select_mii = 1, |
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800 | 755 | .magic = 1, |
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801 | 756 | .cexcr = 1, |
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.. | .. |
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958 | 913 | { |
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959 | 914 | struct sh_eth_private *mdp = netdev_priv(ndev); |
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960 | 915 | |
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| 916 | + if (WARN_ON(!mdp->cd->gecmr)) |
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| 917 | + return; |
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| 918 | + |
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961 | 919 | switch (mdp->speed) { |
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962 | 920 | case 10: /* 10BASE */ |
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963 | 921 | sh_eth_write(ndev, 0x00000000, GECMR); |
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.. | .. |
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1003 | 961 | .apr = 1, |
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1004 | 962 | .mpr = 1, |
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1005 | 963 | .tpauser = 1, |
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| 964 | + .gecmr = 1, |
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1006 | 965 | .bculr = 1, |
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1007 | 966 | .hw_swap = 1, |
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1008 | 967 | .rpadir = 1, |
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.. | .. |
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1043 | 1002 | .apr = 1, |
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1044 | 1003 | .mpr = 1, |
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1045 | 1004 | .tpauser = 1, |
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| 1005 | + .gecmr = 1, |
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1046 | 1006 | .bculr = 1, |
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1047 | 1007 | .hw_swap = 1, |
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1048 | 1008 | .no_trimd = 1, |
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1049 | 1009 | .no_ade = 1, |
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1050 | 1010 | .xdfar_rw = 1, |
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1051 | 1011 | .tsu = 1, |
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1052 | | - .hw_checksum = 1, |
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| 1012 | + .csmr = 1, |
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| 1013 | + .rx_csum = 1, |
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1053 | 1014 | .select_mii = 1, |
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1054 | 1015 | .magic = 1, |
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1055 | 1016 | .cexcr = 1, |
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.. | .. |
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1083 | 1044 | .apr = 1, |
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1084 | 1045 | .mpr = 1, |
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1085 | 1046 | .tpauser = 1, |
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| 1047 | + .gecmr = 1, |
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1086 | 1048 | .bculr = 1, |
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1087 | 1049 | .hw_swap = 1, |
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1088 | 1050 | .no_trimd = 1, |
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.. | .. |
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1092 | 1054 | .irq_flags = IRQF_SHARED, |
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1093 | 1055 | .magic = 1, |
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1094 | 1056 | .cexcr = 1, |
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| 1057 | + .rx_csum = 1, |
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1095 | 1058 | .dual_port = 1, |
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1096 | 1059 | }; |
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1097 | 1060 | |
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.. | .. |
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1256 | 1219 | } |
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1257 | 1220 | |
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1258 | 1221 | /* mdio bus control struct */ |
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1259 | | -static struct mdiobb_ops bb_ops = { |
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| 1222 | +static const struct mdiobb_ops bb_ops = { |
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1260 | 1223 | .owner = THIS_MODULE, |
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1261 | 1224 | .set_mdc = sh_mdc_ctrl, |
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1262 | 1225 | .set_mdio_dir = sh_mmd_ctrl, |
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.. | .. |
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1539 | 1502 | mdp->irq_enabled = true; |
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1540 | 1503 | sh_eth_write(ndev, mdp->cd->eesipr_value, EESIPR); |
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1541 | 1504 | |
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1542 | | - /* PAUSE Prohibition */ |
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| 1505 | + /* EMAC Mode: PAUSE prohibition; Duplex; RX Checksum; TX; RX */ |
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1543 | 1506 | sh_eth_write(ndev, ECMR_ZPF | (mdp->duplex ? ECMR_DM : 0) | |
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| 1507 | + (ndev->features & NETIF_F_RXCSUM ? ECMR_RCSC : 0) | |
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1544 | 1508 | ECMR_TE | ECMR_RE, ECMR); |
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1545 | 1509 | |
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1546 | 1510 | if (mdp->cd->set_rate) |
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.. | .. |
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1603 | 1567 | update_mac_address(ndev); |
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1604 | 1568 | } |
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1605 | 1569 | |
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| 1570 | +static void sh_eth_rx_csum(struct sk_buff *skb) |
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| 1571 | +{ |
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| 1572 | + u8 *hw_csum; |
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| 1573 | + |
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| 1574 | + /* The hardware checksum is 2 bytes appended to packet data */ |
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| 1575 | + if (unlikely(skb->len < sizeof(__sum16))) |
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| 1576 | + return; |
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| 1577 | + hw_csum = skb_tail_pointer(skb) - sizeof(__sum16); |
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| 1578 | + skb->csum = csum_unfold((__force __sum16)get_unaligned_le16(hw_csum)); |
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| 1579 | + skb->ip_summed = CHECKSUM_COMPLETE; |
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| 1580 | + skb_trim(skb, skb->len - sizeof(__sum16)); |
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| 1581 | +} |
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| 1582 | + |
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1606 | 1583 | /* Packet receive function */ |
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1607 | 1584 | static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota) |
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1608 | 1585 | { |
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.. | .. |
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1644 | 1621 | * the RFS bits are from bit 25 to bit 16. So, the |
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1645 | 1622 | * driver needs right shifting by 16. |
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1646 | 1623 | */ |
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1647 | | - if (mdp->cd->hw_checksum) |
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| 1624 | + if (mdp->cd->csmr) |
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1648 | 1625 | desc_status >>= 16; |
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1649 | 1626 | |
---|
1650 | 1627 | skb = mdp->rx_skbuff[entry]; |
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.. | .. |
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1677 | 1654 | DMA_FROM_DEVICE); |
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1678 | 1655 | skb_put(skb, pkt_len); |
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1679 | 1656 | skb->protocol = eth_type_trans(skb, ndev); |
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| 1657 | + if (ndev->features & NETIF_F_RXCSUM) |
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| 1658 | + sh_eth_rx_csum(skb); |
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1680 | 1659 | netif_receive_skb(skb); |
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1681 | 1660 | ndev->stats.rx_packets++; |
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1682 | 1661 | ndev->stats.rx_bytes += pkt_len; |
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.. | .. |
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2000 | 1979 | if ((mdp->cd->no_psr || mdp->no_ether_link) && phydev->link) |
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2001 | 1980 | sh_eth_rcv_snd_enable(ndev); |
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2002 | 1981 | |
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2003 | | - mmiowb(); |
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2004 | 1982 | spin_unlock_irqrestore(&mdp->lock, flags); |
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2005 | 1983 | |
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2006 | 1984 | if (new_state && netif_msg_link(mdp)) |
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.. | .. |
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2127 | 2105 | add_reg(EESR); |
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2128 | 2106 | add_reg(EESIPR); |
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2129 | 2107 | add_reg(TDLAR); |
---|
2130 | | - add_reg(TDFAR); |
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| 2108 | + if (!cd->no_xdfar) |
---|
| 2109 | + add_reg(TDFAR); |
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2131 | 2110 | add_reg(TDFXR); |
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2132 | 2111 | add_reg(TDFFR); |
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2133 | 2112 | add_reg(RDLAR); |
---|
2134 | | - add_reg(RDFAR); |
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| 2113 | + if (!cd->no_xdfar) |
---|
| 2114 | + add_reg(RDFAR); |
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2135 | 2115 | add_reg(RDFXR); |
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2136 | 2116 | add_reg(RDFFR); |
---|
2137 | 2117 | add_reg(TRSCER); |
---|
.. | .. |
---|
2166 | 2146 | if (cd->tpauser) |
---|
2167 | 2147 | add_reg(TPAUSER); |
---|
2168 | 2148 | add_reg(TPAUSECR); |
---|
2169 | | - add_reg(GECMR); |
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| 2149 | + if (cd->gecmr) |
---|
| 2150 | + add_reg(GECMR); |
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2170 | 2151 | if (cd->bculr) |
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2171 | 2152 | add_reg(BCULR); |
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2172 | 2153 | add_reg(MAHR); |
---|
2173 | 2154 | add_reg(MALR); |
---|
2174 | | - add_reg(TROCR); |
---|
2175 | | - add_reg(CDCR); |
---|
2176 | | - add_reg(LCCR); |
---|
2177 | | - add_reg(CNDCR); |
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| 2155 | + if (!cd->no_tx_cntrs) { |
---|
| 2156 | + add_reg(TROCR); |
---|
| 2157 | + add_reg(CDCR); |
---|
| 2158 | + add_reg(LCCR); |
---|
| 2159 | + add_reg(CNDCR); |
---|
| 2160 | + } |
---|
2178 | 2161 | add_reg(CEFCR); |
---|
2179 | 2162 | add_reg(FRECR); |
---|
2180 | 2163 | add_reg(TSFRCR); |
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2181 | 2164 | add_reg(TLFRCR); |
---|
2182 | | - add_reg(CERCR); |
---|
2183 | | - add_reg(CEECR); |
---|
| 2165 | + if (cd->cexcr) { |
---|
| 2166 | + add_reg(CERCR); |
---|
| 2167 | + add_reg(CEECR); |
---|
| 2168 | + } |
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2184 | 2169 | add_reg(MAFCR); |
---|
2185 | 2170 | if (cd->rtrate) |
---|
2186 | 2171 | add_reg(RTRATE); |
---|
2187 | | - if (cd->hw_checksum) |
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| 2172 | + if (cd->csmr) |
---|
2188 | 2173 | add_reg(CSMR); |
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2189 | 2174 | if (cd->select_mii) |
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2190 | 2175 | add_reg(RMII_MII); |
---|
.. | .. |
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2469 | 2454 | } |
---|
2470 | 2455 | |
---|
2471 | 2456 | /* Timeout function */ |
---|
2472 | | -static void sh_eth_tx_timeout(struct net_device *ndev) |
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| 2457 | +static void sh_eth_tx_timeout(struct net_device *ndev, unsigned int txqueue) |
---|
2473 | 2458 | { |
---|
2474 | 2459 | struct sh_eth_private *mdp = netdev_priv(ndev); |
---|
2475 | 2460 | struct sh_eth_rxdesc *rxdesc; |
---|
.. | .. |
---|
2504 | 2489 | } |
---|
2505 | 2490 | |
---|
2506 | 2491 | /* Packet transmit function */ |
---|
2507 | | -static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev) |
---|
| 2492 | +static netdev_tx_t sh_eth_start_xmit(struct sk_buff *skb, |
---|
| 2493 | + struct net_device *ndev) |
---|
2508 | 2494 | { |
---|
2509 | 2495 | struct sh_eth_private *mdp = netdev_priv(ndev); |
---|
2510 | 2496 | struct sh_eth_txdesc *txdesc; |
---|
.. | .. |
---|
2633 | 2619 | pm_runtime_put(&mdp->pdev->dev); |
---|
2634 | 2620 | |
---|
2635 | 2621 | return 0; |
---|
2636 | | -} |
---|
2637 | | - |
---|
2638 | | -/* ioctl to device function */ |
---|
2639 | | -static int sh_eth_do_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) |
---|
2640 | | -{ |
---|
2641 | | - struct phy_device *phydev = ndev->phydev; |
---|
2642 | | - |
---|
2643 | | - if (!netif_running(ndev)) |
---|
2644 | | - return -EINVAL; |
---|
2645 | | - |
---|
2646 | | - if (!phydev) |
---|
2647 | | - return -ENODEV; |
---|
2648 | | - |
---|
2649 | | - return phy_mii_ioctl(phydev, rq, cmd); |
---|
2650 | 2622 | } |
---|
2651 | 2623 | |
---|
2652 | 2624 | static int sh_eth_change_mtu(struct net_device *ndev, int new_mtu) |
---|
.. | .. |
---|
2937 | 2909 | spin_unlock_irqrestore(&mdp->lock, flags); |
---|
2938 | 2910 | } |
---|
2939 | 2911 | |
---|
| 2912 | +static void sh_eth_set_rx_csum(struct net_device *ndev, bool enable) |
---|
| 2913 | +{ |
---|
| 2914 | + struct sh_eth_private *mdp = netdev_priv(ndev); |
---|
| 2915 | + unsigned long flags; |
---|
| 2916 | + |
---|
| 2917 | + spin_lock_irqsave(&mdp->lock, flags); |
---|
| 2918 | + |
---|
| 2919 | + /* Disable TX and RX */ |
---|
| 2920 | + sh_eth_rcv_snd_disable(ndev); |
---|
| 2921 | + |
---|
| 2922 | + /* Modify RX Checksum setting */ |
---|
| 2923 | + sh_eth_modify(ndev, ECMR, ECMR_RCSC, enable ? ECMR_RCSC : 0); |
---|
| 2924 | + |
---|
| 2925 | + /* Enable TX and RX */ |
---|
| 2926 | + sh_eth_rcv_snd_enable(ndev); |
---|
| 2927 | + |
---|
| 2928 | + spin_unlock_irqrestore(&mdp->lock, flags); |
---|
| 2929 | +} |
---|
| 2930 | + |
---|
| 2931 | +static int sh_eth_set_features(struct net_device *ndev, |
---|
| 2932 | + netdev_features_t features) |
---|
| 2933 | +{ |
---|
| 2934 | + netdev_features_t changed = ndev->features ^ features; |
---|
| 2935 | + struct sh_eth_private *mdp = netdev_priv(ndev); |
---|
| 2936 | + |
---|
| 2937 | + if (changed & NETIF_F_RXCSUM && mdp->cd->rx_csum) |
---|
| 2938 | + sh_eth_set_rx_csum(ndev, features & NETIF_F_RXCSUM); |
---|
| 2939 | + |
---|
| 2940 | + ndev->features = features; |
---|
| 2941 | + |
---|
| 2942 | + return 0; |
---|
| 2943 | +} |
---|
| 2944 | + |
---|
2940 | 2945 | static int sh_eth_get_vtag_index(struct sh_eth_private *mdp) |
---|
2941 | 2946 | { |
---|
2942 | 2947 | if (!mdp->port) |
---|
.. | .. |
---|
3090 | 3095 | case SH_ETH_REG_GIGABIT: |
---|
3091 | 3096 | reg_offset = sh_eth_offset_gigabit; |
---|
3092 | 3097 | break; |
---|
3093 | | - case SH_ETH_REG_FAST_RZ: |
---|
3094 | | - reg_offset = sh_eth_offset_fast_rz; |
---|
3095 | | - break; |
---|
3096 | 3098 | case SH_ETH_REG_FAST_RCAR: |
---|
3097 | 3099 | reg_offset = sh_eth_offset_fast_rcar; |
---|
3098 | 3100 | break; |
---|
.. | .. |
---|
3114 | 3116 | .ndo_get_stats = sh_eth_get_stats, |
---|
3115 | 3117 | .ndo_set_rx_mode = sh_eth_set_rx_mode, |
---|
3116 | 3118 | .ndo_tx_timeout = sh_eth_tx_timeout, |
---|
3117 | | - .ndo_do_ioctl = sh_eth_do_ioctl, |
---|
| 3119 | + .ndo_do_ioctl = phy_do_ioctl_running, |
---|
3118 | 3120 | .ndo_change_mtu = sh_eth_change_mtu, |
---|
3119 | 3121 | .ndo_validate_addr = eth_validate_addr, |
---|
3120 | 3122 | .ndo_set_mac_address = eth_mac_addr, |
---|
| 3123 | + .ndo_set_features = sh_eth_set_features, |
---|
3121 | 3124 | }; |
---|
3122 | 3125 | |
---|
3123 | 3126 | static const struct net_device_ops sh_eth_netdev_ops_tsu = { |
---|
.. | .. |
---|
3129 | 3132 | .ndo_vlan_rx_add_vid = sh_eth_vlan_rx_add_vid, |
---|
3130 | 3133 | .ndo_vlan_rx_kill_vid = sh_eth_vlan_rx_kill_vid, |
---|
3131 | 3134 | .ndo_tx_timeout = sh_eth_tx_timeout, |
---|
3132 | | - .ndo_do_ioctl = sh_eth_do_ioctl, |
---|
| 3135 | + .ndo_do_ioctl = phy_do_ioctl_running, |
---|
3133 | 3136 | .ndo_change_mtu = sh_eth_change_mtu, |
---|
3134 | 3137 | .ndo_validate_addr = eth_validate_addr, |
---|
3135 | 3138 | .ndo_set_mac_address = eth_mac_addr, |
---|
| 3139 | + .ndo_set_features = sh_eth_set_features, |
---|
3136 | 3140 | }; |
---|
3137 | 3141 | |
---|
3138 | 3142 | #ifdef CONFIG_OF |
---|
.. | .. |
---|
3140 | 3144 | { |
---|
3141 | 3145 | struct device_node *np = dev->of_node; |
---|
3142 | 3146 | struct sh_eth_plat_data *pdata; |
---|
| 3147 | + phy_interface_t interface; |
---|
3143 | 3148 | const char *mac_addr; |
---|
3144 | 3149 | int ret; |
---|
3145 | 3150 | |
---|
.. | .. |
---|
3147 | 3152 | if (!pdata) |
---|
3148 | 3153 | return NULL; |
---|
3149 | 3154 | |
---|
3150 | | - ret = of_get_phy_mode(np); |
---|
3151 | | - if (ret < 0) |
---|
| 3155 | + ret = of_get_phy_mode(np, &interface); |
---|
| 3156 | + if (ret) |
---|
3152 | 3157 | return NULL; |
---|
3153 | | - pdata->phy_interface = ret; |
---|
| 3158 | + pdata->phy_interface = interface; |
---|
3154 | 3159 | |
---|
3155 | 3160 | mac_addr = of_get_mac_address(np); |
---|
3156 | | - if (mac_addr) |
---|
3157 | | - memcpy(pdata->mac_addr, mac_addr, ETH_ALEN); |
---|
| 3161 | + if (!IS_ERR(mac_addr)) |
---|
| 3162 | + ether_addr_copy(pdata->mac_addr, mac_addr); |
---|
3158 | 3163 | |
---|
3159 | 3164 | pdata->no_ether_link = |
---|
3160 | 3165 | of_property_read_bool(np, "renesas,no-ether-link"); |
---|
.. | .. |
---|
3265 | 3270 | ndev->max_mtu = 2000 - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); |
---|
3266 | 3271 | ndev->min_mtu = ETH_MIN_MTU; |
---|
3267 | 3272 | |
---|
| 3273 | + if (mdp->cd->rx_csum) { |
---|
| 3274 | + ndev->features = NETIF_F_RXCSUM; |
---|
| 3275 | + ndev->hw_features = NETIF_F_RXCSUM; |
---|
| 3276 | + } |
---|
| 3277 | + |
---|
3268 | 3278 | /* set function */ |
---|
3269 | 3279 | if (mdp->cd->tsu) |
---|
3270 | 3280 | ndev->netdev_ops = &sh_eth_netdev_ops_tsu; |
---|
.. | .. |
---|
3314 | 3324 | goto out_release; |
---|
3315 | 3325 | } |
---|
3316 | 3326 | mdp->port = port; |
---|
3317 | | - ndev->features = NETIF_F_HW_VLAN_CTAG_FILTER; |
---|
| 3327 | + ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; |
---|
3318 | 3328 | |
---|
3319 | 3329 | /* Need to init only the first port of the two sharing a TSU */ |
---|
3320 | 3330 | if (port == 0) { |
---|