hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/net/ethernet/mscc/ocelot_io.c
....@@ -21,7 +21,7 @@
2121 ocelot->map[target][reg & REG_MASK] + offset, &val);
2222 return val;
2323 }
24
-EXPORT_SYMBOL(__ocelot_read_ix);
24
+EXPORT_SYMBOL_GPL(__ocelot_read_ix);
2525
2626 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 offset)
2727 {
....@@ -32,7 +32,7 @@
3232 regmap_write(ocelot->targets[target],
3333 ocelot->map[target][reg & REG_MASK] + offset, val);
3434 }
35
-EXPORT_SYMBOL(__ocelot_write_ix);
35
+EXPORT_SYMBOL_GPL(__ocelot_write_ix);
3636
3737 void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask, u32 reg,
3838 u32 offset)
....@@ -45,19 +45,56 @@
4545 ocelot->map[target][reg & REG_MASK] + offset,
4646 mask, val);
4747 }
48
-EXPORT_SYMBOL(__ocelot_rmw_ix);
48
+EXPORT_SYMBOL_GPL(__ocelot_rmw_ix);
4949
5050 u32 ocelot_port_readl(struct ocelot_port *port, u32 reg)
5151 {
52
- return readl(port->regs + reg);
52
+ struct ocelot *ocelot = port->ocelot;
53
+ u16 target = reg >> TARGET_OFFSET;
54
+ u32 val;
55
+
56
+ WARN_ON(!target);
57
+
58
+ regmap_read(port->target, ocelot->map[target][reg & REG_MASK], &val);
59
+ return val;
5360 }
54
-EXPORT_SYMBOL(ocelot_port_readl);
61
+EXPORT_SYMBOL_GPL(ocelot_port_readl);
5562
5663 void ocelot_port_writel(struct ocelot_port *port, u32 val, u32 reg)
5764 {
58
- writel(val, port->regs + reg);
65
+ struct ocelot *ocelot = port->ocelot;
66
+ u16 target = reg >> TARGET_OFFSET;
67
+
68
+ WARN_ON(!target);
69
+
70
+ regmap_write(port->target, ocelot->map[target][reg & REG_MASK], val);
5971 }
60
-EXPORT_SYMBOL(ocelot_port_writel);
72
+EXPORT_SYMBOL_GPL(ocelot_port_writel);
73
+
74
+void ocelot_port_rmwl(struct ocelot_port *port, u32 val, u32 mask, u32 reg)
75
+{
76
+ u32 cur = ocelot_port_readl(port, reg);
77
+
78
+ ocelot_port_writel(port, (cur & (~mask)) | val, reg);
79
+}
80
+EXPORT_SYMBOL_GPL(ocelot_port_rmwl);
81
+
82
+u32 __ocelot_target_read_ix(struct ocelot *ocelot, enum ocelot_target target,
83
+ u32 reg, u32 offset)
84
+{
85
+ u32 val;
86
+
87
+ regmap_read(ocelot->targets[target],
88
+ ocelot->map[target][reg] + offset, &val);
89
+ return val;
90
+}
91
+
92
+void __ocelot_target_write_ix(struct ocelot *ocelot, enum ocelot_target target,
93
+ u32 val, u32 reg, u32 offset)
94
+{
95
+ regmap_write(ocelot->targets[target],
96
+ ocelot->map[target][reg] + offset, val);
97
+}
6198
6299 int ocelot_regfields_init(struct ocelot *ocelot,
63100 const struct reg_field *const regfields)
....@@ -77,6 +114,8 @@
77114 regfield.reg = ocelot->map[target][reg & REG_MASK];
78115 regfield.lsb = regfields[i].lsb;
79116 regfield.msb = regfields[i].msb;
117
+ regfield.id_size = regfields[i].id_size;
118
+ regfield.id_offset = regfields[i].id_offset;
80119
81120 ocelot->regfields[i] =
82121 devm_regmap_field_alloc(ocelot->dev,
....@@ -89,7 +128,7 @@
89128
90129 return 0;
91130 }
92
-EXPORT_SYMBOL(ocelot_regfields_init);
131
+EXPORT_SYMBOL_GPL(ocelot_regfields_init);
93132
94133 static struct regmap_config ocelot_regmap_config = {
95134 .reg_bits = 32,
....@@ -97,20 +136,16 @@
97136 .reg_stride = 4,
98137 };
99138
100
-struct regmap *ocelot_io_platform_init(struct ocelot *ocelot,
101
- struct platform_device *pdev,
102
- const char *name)
139
+struct regmap *ocelot_regmap_init(struct ocelot *ocelot, struct resource *res)
103140 {
104
- struct resource *res;
105141 void __iomem *regs;
106142
107
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
108143 regs = devm_ioremap_resource(ocelot->dev, res);
109144 if (IS_ERR(regs))
110145 return ERR_CAST(regs);
111146
112
- ocelot_regmap_config.name = name;
113
- return devm_regmap_init_mmio(ocelot->dev, regs,
114
- &ocelot_regmap_config);
147
+ ocelot_regmap_config.name = res->name;
148
+
149
+ return devm_regmap_init_mmio(ocelot->dev, regs, &ocelot_regmap_config);
115150 }
116
-EXPORT_SYMBOL(ocelot_io_platform_init);
151
+EXPORT_SYMBOL_GPL(ocelot_regmap_init);