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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2016 NVIDIA CORPORATION, All Rights Reserved. |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License version 2 as |
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6 | | - * published by the Free Software Foundation. |
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7 | | - * |
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8 | | - * This program is distributed in the hope that it will be useful, |
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9 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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10 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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11 | | - * GNU General Public License for more details. |
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12 | | - * |
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13 | | - * You should have received a copy of the GNU General Public License |
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14 | | - * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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15 | 4 | */ |
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16 | 5 | #include <linux/module.h> |
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17 | 6 | #include <linux/clk.h> |
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.. | .. |
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19 | 8 | #include <linux/of_irq.h> |
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20 | 9 | #include <linux/irqchip/arm-gic.h> |
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21 | 10 | #include <linux/platform_device.h> |
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22 | | -#include <linux/pm_clock.h> |
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23 | 11 | #include <linux/pm_runtime.h> |
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24 | 12 | #include <linux/slab.h> |
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25 | 13 | |
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.. | .. |
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28 | 16 | const char *const *clocks; |
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29 | 17 | }; |
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30 | 18 | |
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| 19 | +struct gic_chip_pm { |
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| 20 | + struct gic_chip_data *chip_data; |
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| 21 | + const struct gic_clk_data *clk_data; |
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| 22 | + struct clk_bulk_data *clks; |
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| 23 | +}; |
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| 24 | + |
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31 | 25 | static int gic_runtime_resume(struct device *dev) |
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32 | 26 | { |
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33 | | - struct gic_chip_data *gic = dev_get_drvdata(dev); |
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| 27 | + struct gic_chip_pm *chip_pm = dev_get_drvdata(dev); |
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| 28 | + struct gic_chip_data *gic = chip_pm->chip_data; |
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| 29 | + const struct gic_clk_data *data = chip_pm->clk_data; |
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34 | 30 | int ret; |
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35 | 31 | |
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36 | | - ret = pm_clk_resume(dev); |
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37 | | - if (ret) |
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| 32 | + ret = clk_bulk_prepare_enable(data->num_clocks, chip_pm->clks); |
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| 33 | + if (ret) { |
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| 34 | + dev_err(dev, "clk_enable failed: %d\n", ret); |
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38 | 35 | return ret; |
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| 36 | + } |
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39 | 37 | |
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40 | 38 | /* |
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41 | | - * On the very first resume, the pointer to the driver data |
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| 39 | + * On the very first resume, the pointer to chip_pm->chip_data |
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42 | 40 | * will be NULL and this is intentional, because we do not |
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43 | 41 | * want to restore the GIC on the very first resume. So if |
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44 | 42 | * the pointer is not valid just return. |
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.. | .. |
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54 | 52 | |
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55 | 53 | static int gic_runtime_suspend(struct device *dev) |
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56 | 54 | { |
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57 | | - struct gic_chip_data *gic = dev_get_drvdata(dev); |
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| 55 | + struct gic_chip_pm *chip_pm = dev_get_drvdata(dev); |
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| 56 | + struct gic_chip_data *gic = chip_pm->chip_data; |
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| 57 | + const struct gic_clk_data *data = chip_pm->clk_data; |
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58 | 58 | |
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59 | 59 | gic_dist_save(gic); |
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60 | 60 | gic_cpu_save(gic); |
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61 | 61 | |
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62 | | - return pm_clk_suspend(dev); |
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63 | | -} |
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64 | | - |
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65 | | -static int gic_get_clocks(struct device *dev, const struct gic_clk_data *data) |
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66 | | -{ |
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67 | | - unsigned int i; |
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68 | | - int ret; |
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69 | | - |
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70 | | - if (!dev || !data) |
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71 | | - return -EINVAL; |
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72 | | - |
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73 | | - ret = pm_clk_create(dev); |
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74 | | - if (ret) |
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75 | | - return ret; |
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76 | | - |
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77 | | - for (i = 0; i < data->num_clocks; i++) { |
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78 | | - ret = of_pm_clk_add_clk(dev, data->clocks[i]); |
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79 | | - if (ret) { |
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80 | | - dev_err(dev, "failed to add clock %s\n", |
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81 | | - data->clocks[i]); |
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82 | | - pm_clk_destroy(dev); |
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83 | | - return ret; |
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84 | | - } |
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85 | | - } |
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| 62 | + clk_bulk_disable_unprepare(data->num_clocks, chip_pm->clks); |
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86 | 63 | |
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87 | 64 | return 0; |
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88 | 65 | } |
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.. | .. |
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91 | 68 | { |
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92 | 69 | struct device *dev = &pdev->dev; |
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93 | 70 | const struct gic_clk_data *data; |
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94 | | - struct gic_chip_data *gic; |
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95 | | - int ret, irq; |
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| 71 | + struct gic_chip_pm *chip_pm; |
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| 72 | + int ret, irq, i; |
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96 | 73 | |
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97 | 74 | data = of_device_get_match_data(&pdev->dev); |
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98 | 75 | if (!data) { |
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.. | .. |
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100 | 77 | return -ENODEV; |
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101 | 78 | } |
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102 | 79 | |
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| 80 | + chip_pm = devm_kzalloc(dev, sizeof(*chip_pm), GFP_KERNEL); |
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| 81 | + if (!chip_pm) |
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| 82 | + return -ENOMEM; |
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| 83 | + |
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103 | 84 | irq = irq_of_parse_and_map(dev->of_node, 0); |
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104 | 85 | if (!irq) { |
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105 | 86 | dev_err(dev, "no parent interrupt found!\n"); |
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106 | 87 | return -EINVAL; |
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107 | 88 | } |
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108 | 89 | |
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109 | | - ret = gic_get_clocks(dev, data); |
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| 90 | + chip_pm->clks = devm_kcalloc(dev, data->num_clocks, |
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| 91 | + sizeof(*chip_pm->clks), GFP_KERNEL); |
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| 92 | + if (!chip_pm->clks) |
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| 93 | + return -ENOMEM; |
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| 94 | + |
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| 95 | + for (i = 0; i < data->num_clocks; i++) |
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| 96 | + chip_pm->clks[i].id = data->clocks[i]; |
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| 97 | + |
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| 98 | + ret = devm_clk_bulk_get(dev, data->num_clocks, chip_pm->clks); |
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110 | 99 | if (ret) |
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111 | 100 | goto irq_dispose; |
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112 | 101 | |
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| 102 | + chip_pm->clk_data = data; |
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| 103 | + dev_set_drvdata(dev, chip_pm); |
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| 104 | + |
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113 | 105 | pm_runtime_enable(dev); |
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114 | 106 | |
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115 | | - ret = pm_runtime_get_sync(dev); |
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| 107 | + ret = pm_runtime_resume_and_get(dev); |
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116 | 108 | if (ret < 0) |
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117 | 109 | goto rpm_disable; |
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118 | 110 | |
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119 | | - ret = gic_of_init_child(dev, &gic, irq); |
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| 111 | + ret = gic_of_init_child(dev, &chip_pm->chip_data, irq); |
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120 | 112 | if (ret) |
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121 | 113 | goto rpm_put; |
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122 | | - |
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123 | | - platform_set_drvdata(pdev, gic); |
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124 | 114 | |
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125 | 115 | pm_runtime_put(dev); |
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126 | 116 | |
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.. | .. |
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132 | 122 | pm_runtime_put_sync(dev); |
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133 | 123 | rpm_disable: |
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134 | 124 | pm_runtime_disable(dev); |
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135 | | - pm_clk_destroy(dev); |
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136 | 125 | irq_dispose: |
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137 | 126 | irq_dispose_mapping(irq); |
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138 | 127 | |
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.. | .. |
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142 | 131 | static const struct dev_pm_ops gic_pm_ops = { |
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143 | 132 | SET_RUNTIME_PM_OPS(gic_runtime_suspend, |
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144 | 133 | gic_runtime_resume, NULL) |
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| 134 | + SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
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| 135 | + pm_runtime_force_resume) |
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145 | 136 | }; |
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146 | 137 | |
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147 | 138 | static const char * const gic400_clocks[] = { |
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