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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/irqchip/irq-dw-apb-ictl.c
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@@ -17,6 +17,7 @@
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 #include <linux/irqchip/chained_irq.h>
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 #include <linux/of_address.h>
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 #include <linux/of_irq.h>
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+#include <linux/interrupt.h>
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 #define APB_INT_ENABLE_L	0x00
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 #define APB_INT_ENABLE_H	0x04
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@@ -26,7 +27,28 @@
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 #define APB_INT_FINALSTATUS_H	0x34
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 #define APB_INT_BASE_OFFSET	0x04
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-static void dw_apb_ictl_handler(struct irq_desc *desc)
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+/* irq domain of the primary interrupt controller. */
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+static struct irq_domain *dw_apb_ictl_irq_domain;
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+
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+static void __irq_entry dw_apb_ictl_handle_irq(struct pt_regs *regs)
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+{
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+	struct irq_domain *d = dw_apb_ictl_irq_domain;
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+	int n;
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+
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+	for (n = 0; n < d->revmap_size; n += 32) {
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+		struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, n);
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+		u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L);
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+
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+		while (stat) {
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+			u32 hwirq = ffs(stat) - 1;
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+
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+			handle_domain_irq(d, hwirq, regs);
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+			stat &= ~BIT(hwirq);
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+		}
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+	}
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+}
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+
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+static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc)
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 {
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 	struct irq_domain *d = irq_desc_get_handler_data(desc);
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 	struct irq_chip *chip = irq_desc_get_chip(desc);
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@@ -43,12 +65,36 @@
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 			u32 virq = irq_find_mapping(d, gc->irq_base + hwirq);
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 			generic_handle_irq(virq);
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-			stat &= ~(1 << hwirq);
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+			stat &= ~BIT(hwirq);
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 		}
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 	}
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 	chained_irq_exit(chip, desc);
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 }
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+
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+static int dw_apb_ictl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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+				unsigned int nr_irqs, void *arg)
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+{
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+	int i, ret;
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+	irq_hw_number_t hwirq;
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+	unsigned int type = IRQ_TYPE_NONE;
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+	struct irq_fwspec *fwspec = arg;
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+
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+	ret = irq_domain_translate_onecell(domain, fwspec, &hwirq, &type);
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+	if (ret)
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+		return ret;
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+
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+	for (i = 0; i < nr_irqs; i++)
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+		irq_map_generic_chip(domain, virq + i, hwirq + i);
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+
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+	return 0;
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+}
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+
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+static const struct irq_domain_ops dw_apb_ictl_irq_domain_ops = {
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+	.translate = irq_domain_translate_onecell,
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+	.alloc = dw_apb_ictl_irq_domain_alloc,
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+	.free = irq_domain_free_irqs_top,
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+};
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 #ifdef CONFIG_PM
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 static void dw_apb_ictl_resume(struct irq_data *d)
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@@ -68,19 +114,27 @@
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 static int __init dw_apb_ictl_init(struct device_node *np,
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 				   struct device_node *parent)
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 {
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+	const struct irq_domain_ops *domain_ops;
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 	unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
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 	struct resource r;
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 	struct irq_domain *domain;
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 	struct irq_chip_generic *gc;
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 	void __iomem *iobase;
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-	int ret, nrirqs, irq, i;
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+	int ret, nrirqs, parent_irq, i;
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 	u32 reg;
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-	/* Map the parent interrupt for the chained handler */
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-	irq = irq_of_parse_and_map(np, 0);
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-	if (irq <= 0) {
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-		pr_err("%pOF: unable to parse irq\n", np);
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-		return -EINVAL;
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+	if (!parent) {
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+		/* Used as the primary interrupt controller */
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+		parent_irq = 0;
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+		domain_ops = &dw_apb_ictl_irq_domain_ops;
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+	} else {
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+		/* Map the parent interrupt for the chained handler */
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+		parent_irq = irq_of_parse_and_map(np, 0);
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+		if (parent_irq <= 0) {
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+			pr_err("%pOF: unable to parse irq\n", np);
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+			return -EINVAL;
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+		}
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+		domain_ops = &irq_generic_chip_ops;
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 	}
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 	ret = of_address_to_resource(np, 0, &r);
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@@ -105,7 +159,7 @@
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 	 * DW IP can be configured to allow 2-64 irqs. We can determine
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 	 * the number of irqs supported by writing into enable register
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 	 * and look for bits not set, as corresponding flip-flops will
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-	 * have been removed by sythesis tool.
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+	 * have been removed by synthesis tool.
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 	 */
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 	/* mask and enable all interrupts */
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@@ -120,8 +174,7 @@
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 	else
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 		nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L));
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-	domain = irq_domain_add_linear(np, nrirqs,
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-				       &irq_generic_chip_ops, NULL);
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+	domain = irq_domain_add_linear(np, nrirqs, domain_ops, NULL);
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 	if (!domain) {
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 		pr_err("%pOF: unable to add irq domain\n", np);
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 		ret = -ENOMEM;
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@@ -146,7 +199,13 @@
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 		gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume;
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 	}
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-	irq_set_chained_handler_and_data(irq, dw_apb_ictl_handler, domain);
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+	if (parent_irq) {
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+		irq_set_chained_handler_and_data(parent_irq,
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+				dw_apb_ictl_handle_irq_cascaded, domain);
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+	} else {
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+		dw_apb_ictl_irq_domain = domain;
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+		set_handle_irq(dw_apb_ictl_handle_irq);
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+	}
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 	return 0;
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