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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/irqchip/irq-brcmstb-l2.c
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@@ -1,16 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Generic Broadcom Set Top Box Level 2 Interrupt controller driver
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  *
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  * Copyright (C) 2014-2017 Broadcom
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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- * GNU General Public License for more details.
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  */
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 #define pr_fmt(fmt)	KBUILD_MODNAME	": " fmt
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@@ -169,6 +161,7 @@
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 					  *init_params)
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 {
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 	unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
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+	unsigned int set = 0;
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 	struct brcmstb_l2_intc_data *data;
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 	struct irq_chip_type *ct;
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 	int ret;
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@@ -216,9 +209,12 @@
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 	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
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 		flags |= IRQ_GC_BE_IO;
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+	if (init_params->handler == handle_level_irq)
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+		set |= IRQ_LEVEL;
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+
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 	/* Allocate a single Generic IRQ chip for this node */
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 	ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
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-			np->full_name, init_params->handler, clr, 0, flags);
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+			np->full_name, init_params->handler, clr, set, flags);
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 	if (ret) {
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 		pr_err("failed to allocate generic irq chip\n");
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 		goto out_free_domain;
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@@ -262,7 +258,10 @@
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 		 */
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 		data->gc->wake_enabled = 0xffffffff;
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 		ct->chip.irq_set_wake = irq_gc_set_wake;
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+		enable_irq_wake(parent_irq);
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 	}
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+
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+	pr_info("registered L2 intc (%pOF, parent irq: %d)\n", np, parent_irq);
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 	return 0;
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@@ -275,14 +274,18 @@
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 	return ret;
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 }
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-int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
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+static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
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 	struct device_node *parent)
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 {
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 	return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init);
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 }
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 IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init);
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+IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc",
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+		brcmstb_l2_edge_intc_of_init);
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+IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc",
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+		brcmstb_l2_edge_intc_of_init);
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-int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
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+static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
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 	struct device_node *parent)
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 {
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 	return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init);