.. | .. |
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161 | 161 | *init_params) |
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162 | 162 | { |
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163 | 163 | unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; |
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| 164 | + unsigned int set = 0; |
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164 | 165 | struct brcmstb_l2_intc_data *data; |
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165 | 166 | struct irq_chip_type *ct; |
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166 | 167 | int ret; |
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.. | .. |
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208 | 209 | if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) |
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209 | 210 | flags |= IRQ_GC_BE_IO; |
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210 | 211 | |
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| 212 | + if (init_params->handler == handle_level_irq) |
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| 213 | + set |= IRQ_LEVEL; |
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| 214 | + |
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211 | 215 | /* Allocate a single Generic IRQ chip for this node */ |
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212 | 216 | ret = irq_alloc_domain_generic_chips(data->domain, 32, 1, |
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213 | | - np->full_name, init_params->handler, clr, 0, flags); |
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| 217 | + np->full_name, init_params->handler, clr, set, flags); |
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214 | 218 | if (ret) { |
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215 | 219 | pr_err("failed to allocate generic irq chip\n"); |
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216 | 220 | goto out_free_domain; |
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