hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/irqchip/irq-bcm6345-l1.c
....@@ -1,12 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Broadcom BCM6345 style Level 1 interrupt controller driver
34 *
45 * Copyright (C) 2014 Broadcom Corporation
56 * Copyright 2015 Simon Arlott
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
107 *
118 * This is based on the BCM7038 (which supports SMP) but with a single
129 * enable register instead of separate mask/set/clear registers.
....@@ -85,6 +82,7 @@
8582 };
8683
8784 struct bcm6345_l1_cpu {
85
+ struct bcm6345_l1_chip *intc;
8886 void __iomem *map_base;
8987 unsigned int parent_irq;
9088 u32 enable_cache[];
....@@ -118,16 +116,10 @@
118116
119117 static void bcm6345_l1_irq_handle(struct irq_desc *desc)
120118 {
121
- struct bcm6345_l1_chip *intc = irq_desc_get_handler_data(desc);
122
- struct bcm6345_l1_cpu *cpu;
119
+ struct bcm6345_l1_cpu *cpu = irq_desc_get_handler_data(desc);
120
+ struct bcm6345_l1_chip *intc = cpu->intc;
123121 struct irq_chip *chip = irq_desc_get_chip(desc);
124122 unsigned int idx;
125
-
126
-#ifdef CONFIG_SMP
127
- cpu = intc->cpus[cpu_logical_map(smp_processor_id())];
128
-#else
129
- cpu = intc->cpus[0];
130
-#endif
131123
132124 chained_irq_enter(chip, desc);
133125
....@@ -260,6 +252,7 @@
260252 if (!cpu)
261253 return -ENOMEM;
262254
255
+ cpu->intc = intc;
263256 cpu->map_base = ioremap(res.start, sz);
264257 if (!cpu->map_base)
265258 return -ENOMEM;
....@@ -275,7 +268,7 @@
275268 return -EINVAL;
276269 }
277270 irq_set_chained_handler_and_data(cpu->parent_irq,
278
- bcm6345_l1_irq_handle, intc);
271
+ bcm6345_l1_irq_handle, cpu);
279272
280273 return 0;
281274 }