add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/irqchip/irq-bcm2835.c
..
..
@@ -1,16 +1,7 @@
1
+// SPDX-License-Identifier: GPL-2.0+
1
2
 /*
2
3
  * Copyright 2010 Broadcom
3
4
  * Copyright 2012 Simon Arlott, Chris Boot, Stephen Warren
4
- *
5
- * This program is free software; you can redistribute it and/or modify
6
- * it under the terms of the GNU General Public License as published by
7
- * the Free Software Foundation; either version 2 of the License, or
8
- * (at your option) any later version.
9
- *
10
- * This program is distributed in the hope that it will be useful,
11
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
12
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
- * GNU General Public License for more details.
14
5
  *
15
6
  * Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits
16
7
  *
..
..
@@ -70,6 +61,7 @@
70
61
 					| SHORTCUT1_MASK | SHORTCUT2_MASK)
71
62
 
72
63
 #define REG_FIQ_CONTROL		0x0c
64
+#define FIQ_CONTROL_ENABLE	BIT(7)
73
65
 
74
66
 #define NR_BANKS		3
75
67
 #define IRQS_PER_BANK		32
..
..
@@ -144,6 +136,7 @@
144
136
 {
145
137
 	void __iomem *base;
146
138
 	int irq, b, i;
139
+	u32 reg;
147
140
 
148
141
 	base = of_iomap(node, 0);
149
142
 	if (!base)
..
..
@@ -166,6 +159,19 @@
166
159
 				handle_level_irq);
167
160
 			irq_set_probe(irq);
168
161
 		}
162
+
163
+		reg = readl_relaxed(intc.enable[b]);
164
+		if (reg) {
165
+			writel_relaxed(reg, intc.disable[b]);
166
+			pr_err(FW_BUG "Bootloader left irq enabled: "
167
+			       "bank %d irq %*pbl\n", b, IRQS_PER_BANK, &reg);
168
+		}
169
+	}
170
+
171
+	reg = readl_relaxed(base + REG_FIQ_CONTROL);
172
+	if (reg & FIQ_CONTROL_ENABLE) {
173
+		writel_relaxed(0, base + REG_FIQ_CONTROL);
174
+		pr_err(FW_BUG "Bootloader left fiq enabled\n");
169
175
 	}
170
176
 
171
177
 	if (is_2836) {