hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/irqchip/irq-aspeed-vic.c
....@@ -71,7 +71,7 @@
7171 writel(0, vic->base + AVIC_INT_SELECT);
7272 writel(0, vic->base + AVIC_INT_SELECT + 4);
7373
74
- /* Some interrupts have a programable high/low level trigger
74
+ /* Some interrupts have a programmable high/low level trigger
7575 * (4 GPIO direct inputs), for now we assume this was configured
7676 * by firmware. We read which ones are edge now.
7777 */
....@@ -203,7 +203,7 @@
203203 }
204204 vic->base = regs;
205205
206
- /* Initialize soures, all masked */
206
+ /* Initialize sources, all masked */
207207 vic_init_hw(vic);
208208
209209 /* Ready to receive interrupts */