hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/i2c/busses/i2c-qcom-geni.c
....@@ -1,6 +1,7 @@
11 // SPDX-License-Identifier: GPL-2.0
22 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
33
4
+#include <linux/acpi.h>
45 #include <linux/clk.h>
56 #include <linux/dma-mapping.h>
67 #include <linux/err.h>
....@@ -9,7 +10,6 @@
910 #include <linux/io.h>
1011 #include <linux/module.h>
1112 #include <linux/of.h>
12
-#include <linux/of_platform.h>
1313 #include <linux/platform_device.h>
1414 #include <linux/pm_runtime.h>
1515 #include <linux/qcom-geni-se.h>
....@@ -86,6 +86,9 @@
8686 u32 clk_freq_out;
8787 const struct geni_i2c_clk_fld *clk_fld;
8888 int suspended;
89
+ void *dma_buf;
90
+ size_t xfer_len;
91
+ dma_addr_t dma_addr;
8992 };
9093
9194 struct geni_i2c_err_log {
....@@ -201,21 +204,22 @@
201204 static irqreturn_t geni_i2c_irq(int irq, void *dev)
202205 {
203206 struct geni_i2c_dev *gi2c = dev;
204
- int j;
207
+ void __iomem *base = gi2c->se.base;
208
+ int j, p;
205209 u32 m_stat;
206210 u32 rx_st;
207211 u32 dm_tx_st;
208212 u32 dm_rx_st;
209213 u32 dma;
214
+ u32 val;
210215 struct i2c_msg *cur;
211
- unsigned long flags;
212216
213
- spin_lock_irqsave(&gi2c->lock, flags);
214
- m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS);
215
- rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS);
216
- dm_tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT);
217
- dm_rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT);
218
- dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN);
217
+ spin_lock(&gi2c->lock);
218
+ m_stat = readl_relaxed(base + SE_GENI_M_IRQ_STATUS);
219
+ rx_st = readl_relaxed(base + SE_GENI_RX_FIFO_STATUS);
220
+ dm_tx_st = readl_relaxed(base + SE_DMA_TX_IRQ_STAT);
221
+ dm_rx_st = readl_relaxed(base + SE_DMA_RX_IRQ_STAT);
222
+ dma = readl_relaxed(base + SE_GENI_DMA_MODE_EN);
219223 cur = gi2c->cur;
220224
221225 if (!cur ||
....@@ -238,26 +242,17 @@
238242
239243 /* Disable the TX Watermark interrupt to stop TX */
240244 if (!dma)
241
- writel_relaxed(0, gi2c->se.base +
242
- SE_GENI_TX_WATERMARK_REG);
243
- goto irqret;
244
- }
245
-
246
- if (dma) {
245
+ writel_relaxed(0, base + SE_GENI_TX_WATERMARK_REG);
246
+ } else if (dma) {
247247 dev_dbg(gi2c->se.dev, "i2c dma tx:0x%x, dma rx:0x%x\n",
248248 dm_tx_st, dm_rx_st);
249
- goto irqret;
250
- }
251
-
252
- if (cur->flags & I2C_M_RD &&
253
- m_stat & (M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN)) {
249
+ } else if (cur->flags & I2C_M_RD &&
250
+ m_stat & (M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN)) {
254251 u32 rxcnt = rx_st & RX_FIFO_WC_MSK;
255252
256253 for (j = 0; j < rxcnt; j++) {
257
- u32 val;
258
- int p = 0;
259
-
260
- val = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFOn);
254
+ p = 0;
255
+ val = readl_relaxed(base + SE_GENI_RX_FIFOn);
261256 while (gi2c->cur_rd < cur->len && p < sizeof(val)) {
262257 cur->buf[gi2c->cur_rd++] = val & 0xff;
263258 val >>= 8;
....@@ -270,44 +265,39 @@
270265 m_stat & M_TX_FIFO_WATERMARK_EN) {
271266 for (j = 0; j < gi2c->tx_wm; j++) {
272267 u32 temp;
273
- u32 val = 0;
274
- int p = 0;
275268
269
+ val = 0;
270
+ p = 0;
276271 while (gi2c->cur_wr < cur->len && p < sizeof(val)) {
277272 temp = cur->buf[gi2c->cur_wr++];
278273 val |= temp << (p * 8);
279274 p++;
280275 }
281
- writel_relaxed(val, gi2c->se.base + SE_GENI_TX_FIFOn);
276
+ writel_relaxed(val, base + SE_GENI_TX_FIFOn);
282277 /* TX Complete, Disable the TX Watermark interrupt */
283278 if (gi2c->cur_wr == cur->len) {
284
- writel_relaxed(0, gi2c->se.base +
285
- SE_GENI_TX_WATERMARK_REG);
279
+ writel_relaxed(0, base + SE_GENI_TX_WATERMARK_REG);
286280 break;
287281 }
288282 }
289283 }
290
-irqret:
284
+
291285 if (m_stat)
292
- writel_relaxed(m_stat, gi2c->se.base + SE_GENI_M_IRQ_CLEAR);
286
+ writel_relaxed(m_stat, base + SE_GENI_M_IRQ_CLEAR);
293287
294
- if (dma) {
295
- if (dm_tx_st)
296
- writel_relaxed(dm_tx_st, gi2c->se.base +
297
- SE_DMA_TX_IRQ_CLR);
298
- if (dm_rx_st)
299
- writel_relaxed(dm_rx_st, gi2c->se.base +
300
- SE_DMA_RX_IRQ_CLR);
301
- }
288
+ if (dma && dm_tx_st)
289
+ writel_relaxed(dm_tx_st, base + SE_DMA_TX_IRQ_CLR);
290
+ if (dma && dm_rx_st)
291
+ writel_relaxed(dm_rx_st, base + SE_DMA_RX_IRQ_CLR);
292
+
302293 /* if this is err with done-bit not set, handle that through timeout. */
303
- if (m_stat & M_CMD_DONE_EN || m_stat & M_CMD_ABORT_EN)
304
- complete(&gi2c->done);
305
- else if (dm_tx_st & TX_DMA_DONE || dm_tx_st & TX_RESET_DONE)
306
- complete(&gi2c->done);
307
- else if (dm_rx_st & RX_DMA_DONE || dm_rx_st & RX_RESET_DONE)
294
+ if (m_stat & M_CMD_DONE_EN || m_stat & M_CMD_ABORT_EN ||
295
+ dm_tx_st & TX_DMA_DONE || dm_tx_st & TX_RESET_DONE ||
296
+ dm_rx_st & RX_DMA_DONE || dm_rx_st & RX_RESET_DONE)
308297 complete(&gi2c->done);
309298
310
- spin_unlock_irqrestore(&gi2c->lock, flags);
299
+ spin_unlock(&gi2c->lock);
300
+
311301 return IRQ_HANDLED;
312302 }
313303
....@@ -361,92 +351,112 @@
361351 dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n");
362352 }
363353
354
+static void geni_i2c_rx_msg_cleanup(struct geni_i2c_dev *gi2c,
355
+ struct i2c_msg *cur)
356
+{
357
+ gi2c->cur_rd = 0;
358
+ if (gi2c->dma_buf) {
359
+ if (gi2c->err)
360
+ geni_i2c_rx_fsm_rst(gi2c);
361
+ geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len);
362
+ i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err);
363
+ }
364
+}
365
+
366
+static void geni_i2c_tx_msg_cleanup(struct geni_i2c_dev *gi2c,
367
+ struct i2c_msg *cur)
368
+{
369
+ gi2c->cur_wr = 0;
370
+ if (gi2c->dma_buf) {
371
+ if (gi2c->err)
372
+ geni_i2c_tx_fsm_rst(gi2c);
373
+ geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len);
374
+ i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err);
375
+ }
376
+}
377
+
364378 static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
365379 u32 m_param)
366380 {
367
- dma_addr_t rx_dma;
368
- enum geni_se_xfer_mode mode;
369
- unsigned long time_left = XFER_TIMEOUT;
370
- void *dma_buf;
381
+ dma_addr_t rx_dma = 0;
382
+ unsigned long time_left;
383
+ void *dma_buf = NULL;
384
+ struct geni_se *se = &gi2c->se;
385
+ size_t len = msg->len;
386
+ struct i2c_msg *cur;
371387
372
- gi2c->cur = msg;
373
- mode = GENI_SE_FIFO;
374
- dma_buf = i2c_get_dma_safe_msg_buf(msg, 32);
388
+ if (!of_machine_is_compatible("lenovo,yoga-c630"))
389
+ dma_buf = i2c_get_dma_safe_msg_buf(msg, 32);
390
+
375391 if (dma_buf)
376
- mode = GENI_SE_DMA;
392
+ geni_se_select_mode(se, GENI_SE_DMA);
393
+ else
394
+ geni_se_select_mode(se, GENI_SE_FIFO);
377395
378
- geni_se_select_mode(&gi2c->se, mode);
379
- writel_relaxed(msg->len, gi2c->se.base + SE_I2C_RX_TRANS_LEN);
380
- geni_se_setup_m_cmd(&gi2c->se, I2C_READ, m_param);
381
- if (mode == GENI_SE_DMA) {
382
- int ret;
396
+ writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN);
397
+ geni_se_setup_m_cmd(se, I2C_READ, m_param);
383398
384
- ret = geni_se_rx_dma_prep(&gi2c->se, dma_buf, msg->len,
385
- &rx_dma);
386
- if (ret) {
387
- mode = GENI_SE_FIFO;
388
- geni_se_select_mode(&gi2c->se, mode);
389
- i2c_put_dma_safe_msg_buf(dma_buf, msg, false);
390
- }
399
+ if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) {
400
+ geni_se_select_mode(se, GENI_SE_FIFO);
401
+ i2c_put_dma_safe_msg_buf(dma_buf, msg, false);
402
+ dma_buf = NULL;
403
+ } else {
404
+ gi2c->xfer_len = len;
405
+ gi2c->dma_addr = rx_dma;
406
+ gi2c->dma_buf = dma_buf;
391407 }
392408
409
+ cur = gi2c->cur;
393410 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
394411 if (!time_left)
395412 geni_i2c_abort_xfer(gi2c);
396413
397
- gi2c->cur_rd = 0;
398
- if (mode == GENI_SE_DMA) {
399
- if (gi2c->err)
400
- geni_i2c_rx_fsm_rst(gi2c);
401
- geni_se_rx_dma_unprep(&gi2c->se, rx_dma, msg->len);
402
- i2c_put_dma_safe_msg_buf(dma_buf, msg, !gi2c->err);
403
- }
414
+ geni_i2c_rx_msg_cleanup(gi2c, cur);
415
+
404416 return gi2c->err;
405417 }
406418
407419 static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
408420 u32 m_param)
409421 {
410
- dma_addr_t tx_dma;
411
- enum geni_se_xfer_mode mode;
422
+ dma_addr_t tx_dma = 0;
412423 unsigned long time_left;
413
- void *dma_buf;
424
+ void *dma_buf = NULL;
425
+ struct geni_se *se = &gi2c->se;
426
+ size_t len = msg->len;
427
+ struct i2c_msg *cur;
414428
415
- gi2c->cur = msg;
416
- mode = GENI_SE_FIFO;
417
- dma_buf = i2c_get_dma_safe_msg_buf(msg, 32);
429
+ if (!of_machine_is_compatible("lenovo,yoga-c630"))
430
+ dma_buf = i2c_get_dma_safe_msg_buf(msg, 32);
431
+
418432 if (dma_buf)
419
- mode = GENI_SE_DMA;
433
+ geni_se_select_mode(se, GENI_SE_DMA);
434
+ else
435
+ geni_se_select_mode(se, GENI_SE_FIFO);
420436
421
- geni_se_select_mode(&gi2c->se, mode);
422
- writel_relaxed(msg->len, gi2c->se.base + SE_I2C_TX_TRANS_LEN);
423
- geni_se_setup_m_cmd(&gi2c->se, I2C_WRITE, m_param);
424
- if (mode == GENI_SE_DMA) {
425
- int ret;
437
+ writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN);
438
+ geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
426439
427
- ret = geni_se_tx_dma_prep(&gi2c->se, dma_buf, msg->len,
428
- &tx_dma);
429
- if (ret) {
430
- mode = GENI_SE_FIFO;
431
- geni_se_select_mode(&gi2c->se, mode);
432
- i2c_put_dma_safe_msg_buf(dma_buf, msg, false);
433
- }
440
+ if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) {
441
+ geni_se_select_mode(se, GENI_SE_FIFO);
442
+ i2c_put_dma_safe_msg_buf(dma_buf, msg, false);
443
+ dma_buf = NULL;
444
+ } else {
445
+ gi2c->xfer_len = len;
446
+ gi2c->dma_addr = tx_dma;
447
+ gi2c->dma_buf = dma_buf;
434448 }
435449
436
- if (mode == GENI_SE_FIFO) /* Get FIFO IRQ */
437
- writel_relaxed(1, gi2c->se.base + SE_GENI_TX_WATERMARK_REG);
450
+ if (!dma_buf) /* Get FIFO IRQ */
451
+ writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG);
438452
453
+ cur = gi2c->cur;
439454 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
440455 if (!time_left)
441456 geni_i2c_abort_xfer(gi2c);
442457
443
- gi2c->cur_wr = 0;
444
- if (mode == GENI_SE_DMA) {
445
- if (gi2c->err)
446
- geni_i2c_tx_fsm_rst(gi2c);
447
- geni_se_tx_dma_unprep(&gi2c->se, tx_dma, msg->len);
448
- i2c_put_dma_safe_msg_buf(dma_buf, msg, !gi2c->err);
449
- }
458
+ geni_i2c_tx_msg_cleanup(gi2c, cur);
459
+
450460 return gi2c->err;
451461 }
452462
....@@ -474,6 +484,7 @@
474484
475485 m_param |= ((msgs[i].addr << SLV_ADDR_SHFT) & SLV_ADDR_MSK);
476486
487
+ gi2c->cur = &msgs[i];
477488 if (msgs[i].flags & I2C_M_RD)
478489 ret = geni_i2c_rx_one_msg(gi2c, &msgs[i], m_param);
479490 else
....@@ -502,48 +513,54 @@
502513 .functionality = geni_i2c_func,
503514 };
504515
516
+#ifdef CONFIG_ACPI
517
+static const struct acpi_device_id geni_i2c_acpi_match[] = {
518
+ { "QCOM0220"},
519
+ { },
520
+};
521
+MODULE_DEVICE_TABLE(acpi, geni_i2c_acpi_match);
522
+#endif
523
+
505524 static int geni_i2c_probe(struct platform_device *pdev)
506525 {
507526 struct geni_i2c_dev *gi2c;
508527 struct resource *res;
509528 u32 proto, tx_depth;
510529 int ret;
530
+ struct device *dev = &pdev->dev;
511531
512
- gi2c = devm_kzalloc(&pdev->dev, sizeof(*gi2c), GFP_KERNEL);
532
+ gi2c = devm_kzalloc(dev, sizeof(*gi2c), GFP_KERNEL);
513533 if (!gi2c)
514534 return -ENOMEM;
515535
516
- gi2c->se.dev = &pdev->dev;
517
- gi2c->se.wrapper = dev_get_drvdata(pdev->dev.parent);
536
+ gi2c->se.dev = dev;
537
+ gi2c->se.wrapper = dev_get_drvdata(dev->parent);
518538 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
519
- gi2c->se.base = devm_ioremap_resource(&pdev->dev, res);
539
+ gi2c->se.base = devm_ioremap_resource(dev, res);
520540 if (IS_ERR(gi2c->se.base))
521541 return PTR_ERR(gi2c->se.base);
522542
523
- gi2c->se.clk = devm_clk_get(&pdev->dev, "se");
524
- if (IS_ERR(gi2c->se.clk)) {
525
- ret = PTR_ERR(gi2c->se.clk);
526
- dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret);
527
- return ret;
528
- }
543
+ gi2c->se.clk = devm_clk_get(dev, "se");
544
+ if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev))
545
+ return PTR_ERR(gi2c->se.clk);
529546
530
- ret = device_property_read_u32(&pdev->dev, "clock-frequency",
531
- &gi2c->clk_freq_out);
547
+ ret = device_property_read_u32(dev, "clock-frequency",
548
+ &gi2c->clk_freq_out);
532549 if (ret) {
533
- dev_info(&pdev->dev,
534
- "Bus frequency not specified, default to 100kHz.\n");
550
+ dev_info(dev, "Bus frequency not specified, default to 100kHz.\n");
535551 gi2c->clk_freq_out = KHZ(100);
536552 }
537553
554
+ if (has_acpi_companion(dev))
555
+ ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(dev));
556
+
538557 gi2c->irq = platform_get_irq(pdev, 0);
539
- if (gi2c->irq < 0) {
540
- dev_err(&pdev->dev, "IRQ error for i2c-geni\n");
558
+ if (gi2c->irq < 0)
541559 return gi2c->irq;
542
- }
543560
544561 ret = geni_i2c_clk_map_idx(gi2c);
545562 if (ret) {
546
- dev_err(&pdev->dev, "Invalid clk frequency %d Hz: %d\n",
563
+ dev_err(dev, "Invalid clk frequency %d Hz: %d\n",
547564 gi2c->clk_freq_out, ret);
548565 return ret;
549566 }
....@@ -552,29 +569,45 @@
552569 init_completion(&gi2c->done);
553570 spin_lock_init(&gi2c->lock);
554571 platform_set_drvdata(pdev, gi2c);
555
- ret = devm_request_irq(&pdev->dev, gi2c->irq, geni_i2c_irq,
556
- IRQF_TRIGGER_HIGH, "i2c_geni", gi2c);
572
+ ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, 0,
573
+ dev_name(dev), gi2c);
557574 if (ret) {
558
- dev_err(&pdev->dev, "Request_irq failed:%d: err:%d\n",
575
+ dev_err(dev, "Request_irq failed:%d: err:%d\n",
559576 gi2c->irq, ret);
560577 return ret;
561578 }
562579 /* Disable the interrupt so that the system can enter low-power mode */
563580 disable_irq(gi2c->irq);
564581 i2c_set_adapdata(&gi2c->adap, gi2c);
565
- gi2c->adap.dev.parent = &pdev->dev;
566
- gi2c->adap.dev.of_node = pdev->dev.of_node;
582
+ gi2c->adap.dev.parent = dev;
583
+ gi2c->adap.dev.of_node = dev->of_node;
567584 strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name));
585
+
586
+ ret = geni_icc_get(&gi2c->se, "qup-memory");
587
+ if (ret)
588
+ return ret;
589
+ /*
590
+ * Set the bus quota for core and cpu to a reasonable value for
591
+ * register access.
592
+ * Set quota for DDR based on bus speed.
593
+ */
594
+ gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW;
595
+ gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW;
596
+ gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out);
597
+
598
+ ret = geni_icc_set_bw(&gi2c->se);
599
+ if (ret)
600
+ return ret;
568601
569602 ret = geni_se_resources_on(&gi2c->se);
570603 if (ret) {
571
- dev_err(&pdev->dev, "Error turning on resources %d\n", ret);
604
+ dev_err(dev, "Error turning on resources %d\n", ret);
572605 return ret;
573606 }
574607 proto = geni_se_read_proto(&gi2c->se);
575608 tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se);
576609 if (proto != GENI_SE_I2C) {
577
- dev_err(&pdev->dev, "Invalid proto %d\n", proto);
610
+ dev_err(dev, "Invalid proto %d\n", proto);
578611 geni_se_resources_off(&gi2c->se);
579612 return -ENXIO;
580613 }
....@@ -584,11 +617,15 @@
584617 true, true, true);
585618 ret = geni_se_resources_off(&gi2c->se);
586619 if (ret) {
587
- dev_err(&pdev->dev, "Error turning off resources %d\n", ret);
620
+ dev_err(dev, "Error turning off resources %d\n", ret);
588621 return ret;
589622 }
590623
591
- dev_dbg(&pdev->dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth);
624
+ ret = geni_icc_disable(&gi2c->se);
625
+ if (ret)
626
+ return ret;
627
+
628
+ dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth);
592629
593630 gi2c->suspended = 1;
594631 pm_runtime_set_suspended(gi2c->se.dev);
....@@ -598,10 +635,12 @@
598635
599636 ret = i2c_add_adapter(&gi2c->adap);
600637 if (ret) {
601
- dev_err(&pdev->dev, "Error adding i2c adapter %d\n", ret);
638
+ dev_err(dev, "Error adding i2c adapter %d\n", ret);
602639 pm_runtime_disable(gi2c->se.dev);
603640 return ret;
604641 }
642
+
643
+ dev_dbg(dev, "Geni-I2C adaptor successfully added\n");
605644
606645 return 0;
607646 }
....@@ -613,6 +652,14 @@
613652 i2c_del_adapter(&gi2c->adap);
614653 pm_runtime_disable(gi2c->se.dev);
615654 return 0;
655
+}
656
+
657
+static void geni_i2c_shutdown(struct platform_device *pdev)
658
+{
659
+ struct geni_i2c_dev *gi2c = platform_get_drvdata(pdev);
660
+
661
+ /* Make client i2c transfers start failing */
662
+ i2c_mark_adapter_suspended(&gi2c->adap);
616663 }
617664
618665 static int __maybe_unused geni_i2c_runtime_suspend(struct device *dev)
....@@ -630,13 +677,17 @@
630677 gi2c->suspended = 1;
631678 }
632679
633
- return 0;
680
+ return geni_icc_disable(&gi2c->se);
634681 }
635682
636683 static int __maybe_unused geni_i2c_runtime_resume(struct device *dev)
637684 {
638685 int ret;
639686 struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
687
+
688
+ ret = geni_icc_enable(&gi2c->se);
689
+ if (ret)
690
+ return ret;
640691
641692 ret = geni_se_resources_on(&gi2c->se);
642693 if (ret)
....@@ -651,6 +702,8 @@
651702 {
652703 struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
653704
705
+ i2c_mark_adapter_suspended(&gi2c->adap);
706
+
654707 if (!gi2c->suspended) {
655708 geni_i2c_runtime_suspend(dev);
656709 pm_runtime_disable(dev);
....@@ -660,8 +713,16 @@
660713 return 0;
661714 }
662715
716
+static int __maybe_unused geni_i2c_resume_noirq(struct device *dev)
717
+{
718
+ struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
719
+
720
+ i2c_mark_adapter_resumed(&gi2c->adap);
721
+ return 0;
722
+}
723
+
663724 static const struct dev_pm_ops geni_i2c_pm_ops = {
664
- SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(geni_i2c_suspend_noirq, NULL)
725
+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(geni_i2c_suspend_noirq, geni_i2c_resume_noirq)
665726 SET_RUNTIME_PM_OPS(geni_i2c_runtime_suspend, geni_i2c_runtime_resume,
666727 NULL)
667728 };
....@@ -675,10 +736,12 @@
675736 static struct platform_driver geni_i2c_driver = {
676737 .probe = geni_i2c_probe,
677738 .remove = geni_i2c_remove,
739
+ .shutdown = geni_i2c_shutdown,
678740 .driver = {
679741 .name = "geni_i2c",
680742 .pm = &geni_i2c_pm_ops,
681743 .of_match_table = geni_i2c_dt_match,
744
+ .acpi_match_table = ACPI_PTR(geni_i2c_acpi_match),
682745 },
683746 };
684747