add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c
..
..
@@ -23,7 +23,19 @@
23
23
 #include "gf100.h"
24
24
 #include "ctxgf100.h"
25
25
 
26
+#include <subdev/acr.h>
27
+
26
28
 #include <nvif/class.h>
29
+
30
+#include <nvfw/flcn.h>
31
+
32
+static const struct nvkm_acr_lsf_func
33
+gp10b_gr_gpccs_acr = {
34
+	.flags = NVKM_ACR_LSF_FORCE_PRIV_LOAD,
35
+	.bld_size = sizeof(struct flcn_bl_dmem_desc),
36
+	.bld_write = gm20b_gr_acr_bld_write,
37
+	.bld_patch = gm20b_gr_acr_bld_patch,
38
+};
27
39
 
28
40
 static const struct gf100_gr_func
29
41
 gp10b_gr = {
..
..
@@ -48,8 +60,8 @@
48
60
 	.gpc_nr = 1,
49
61
 	.tpc_nr = 2,
50
62
 	.ppc_nr = 1,
51
-	.grctx = &gp102_grctx,
52
-	.zbc = &gp102_gr_zbc,
63
+	.grctx = &gp100_grctx,
64
+	.zbc = &gp100_gr_zbc,
53
65
 	.sclass = {
54
66
 		{ -1, -1, FERMI_TWOD_A },
55
67
 		{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },
..
..
@@ -59,8 +71,30 @@
59
71
 	}
60
72
 };
61
73
 
74
+#if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC)
75
+MODULE_FIRMWARE("nvidia/gp10b/gr/fecs_bl.bin");
76
+MODULE_FIRMWARE("nvidia/gp10b/gr/fecs_inst.bin");
77
+MODULE_FIRMWARE("nvidia/gp10b/gr/fecs_data.bin");
78
+MODULE_FIRMWARE("nvidia/gp10b/gr/fecs_sig.bin");
79
+MODULE_FIRMWARE("nvidia/gp10b/gr/gpccs_bl.bin");
80
+MODULE_FIRMWARE("nvidia/gp10b/gr/gpccs_inst.bin");
81
+MODULE_FIRMWARE("nvidia/gp10b/gr/gpccs_data.bin");
82
+MODULE_FIRMWARE("nvidia/gp10b/gr/gpccs_sig.bin");
83
+MODULE_FIRMWARE("nvidia/gp10b/gr/sw_ctx.bin");
84
+MODULE_FIRMWARE("nvidia/gp10b/gr/sw_nonctx.bin");
85
+MODULE_FIRMWARE("nvidia/gp10b/gr/sw_bundle_init.bin");
86
+MODULE_FIRMWARE("nvidia/gp10b/gr/sw_method_init.bin");
87
+#endif
88
+
89
+static const struct gf100_gr_fwif
90
+gp10b_gr_fwif[] = {
91
+	{  0, gm200_gr_load, &gp10b_gr, &gm20b_gr_fecs_acr, &gp10b_gr_gpccs_acr },
92
+	{ -1, gm200_gr_nofw },
93
+	{}
94
+};
95
+
62
96
 int
63
97
 gp10b_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
64
98
 {
65
-	return gm200_gr_new_(&gp10b_gr, device, index, pgr);
99
+	return gf100_gr_new_(gp10b_gr_fwif, device, index, pgr);
66
100
 }