.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * PCA953x 4/8/16/24/40 bit I/O ports |
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3 | 4 | * |
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.. | .. |
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5 | 6 | * Copyright (C) 2007 Marvell International Ltd. |
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6 | 7 | * |
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7 | 8 | * Derived from drivers/i2c/chips/pca9539.c |
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8 | | - * |
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9 | | - * This program is free software; you can redistribute it and/or modify |
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10 | | - * it under the terms of the GNU General Public License as published by |
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11 | | - * the Free Software Foundation; version 2 of the License. |
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12 | 9 | */ |
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13 | 10 | |
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14 | 11 | #include <linux/acpi.h> |
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| 12 | +#include <linux/bitmap.h> |
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15 | 13 | #include <linux/gpio/driver.h> |
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16 | 14 | #include <linux/gpio/consumer.h> |
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17 | 15 | #include <linux/i2c.h> |
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.. | .. |
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20 | 18 | #include <linux/module.h> |
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21 | 19 | #include <linux/of_platform.h> |
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22 | 20 | #include <linux/platform_data/pca953x.h> |
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| 21 | +#include <linux/regmap.h> |
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23 | 22 | #include <linux/regulator/consumer.h> |
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24 | 23 | #include <linux/slab.h> |
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25 | 24 | |
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.. | .. |
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30 | 29 | #define PCA953X_INVERT 0x02 |
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31 | 30 | #define PCA953X_DIRECTION 0x03 |
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32 | 31 | |
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33 | | -#define REG_ADDR_AI 0x80 |
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| 32 | +#define REG_ADDR_MASK GENMASK(5, 0) |
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| 33 | +#define REG_ADDR_EXT BIT(6) |
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| 34 | +#define REG_ADDR_AI BIT(7) |
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34 | 35 | |
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35 | 36 | #define PCA957X_IN 0x00 |
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36 | 37 | #define PCA957X_INVRT 0x01 |
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.. | .. |
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55 | 56 | #define PCAL6524_OUT_INDCONF 0x2c |
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56 | 57 | #define PCAL6524_DEBOUNCE 0x2d |
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57 | 58 | |
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58 | | -#define PCA_GPIO_MASK 0x00FF |
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| 59 | +#define PCA_GPIO_MASK GENMASK(7, 0) |
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59 | 60 | |
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60 | | -#define PCAL_GPIO_MASK 0x1f |
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61 | | -#define PCAL_PINCTRL_MASK 0x60 |
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| 61 | +#define PCAL_GPIO_MASK GENMASK(4, 0) |
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| 62 | +#define PCAL_PINCTRL_MASK GENMASK(6, 5) |
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62 | 63 | |
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63 | | -#define PCA_INT 0x0100 |
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64 | | -#define PCA_PCAL 0x0200 |
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65 | | -#define PCA_LATCH_INT (PCA_PCAL | PCA_INT) |
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66 | | -#define PCA953X_TYPE 0x1000 |
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67 | | -#define PCA957X_TYPE 0x2000 |
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68 | | -#define PCA_TYPE_MASK 0xF000 |
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| 64 | +#define PCA_INT BIT(8) |
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| 65 | +#define PCA_PCAL BIT(9) |
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| 66 | +#define PCA_LATCH_INT (PCA_PCAL | PCA_INT) |
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| 67 | +#define PCA953X_TYPE BIT(12) |
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| 68 | +#define PCA957X_TYPE BIT(13) |
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| 69 | +#define PCA_TYPE_MASK GENMASK(15, 12) |
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69 | 70 | |
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70 | 71 | #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) |
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71 | 72 | |
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72 | 73 | static const struct i2c_device_id pca953x_id[] = { |
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| 74 | + { "pca6416", 16 | PCA953X_TYPE | PCA_INT, }, |
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73 | 75 | { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, |
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74 | 76 | { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, |
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75 | 77 | { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, |
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.. | .. |
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85 | 87 | { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, |
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86 | 88 | { "pca9698", 40 | PCA953X_TYPE, }, |
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87 | 89 | |
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88 | | - { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, |
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89 | | - { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, |
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| 90 | + { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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| 91 | + { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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| 92 | + { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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| 93 | + { "pcal9554b", 8 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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| 94 | + { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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90 | 95 | |
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91 | 96 | { "max7310", 8 | PCA953X_TYPE, }, |
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92 | 97 | { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, |
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.. | .. |
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104 | 109 | }; |
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105 | 110 | MODULE_DEVICE_TABLE(i2c, pca953x_id); |
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106 | 111 | |
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| 112 | +#ifdef CONFIG_GPIO_PCA953X_IRQ |
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| 113 | + |
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| 114 | +#include <linux/dmi.h> |
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| 115 | + |
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| 116 | +static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true }; |
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| 117 | + |
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| 118 | +static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = { |
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| 119 | + { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER }, |
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| 120 | + { } |
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| 121 | +}; |
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| 122 | + |
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| 123 | +static int pca953x_acpi_get_irq(struct device *dev) |
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| 124 | +{ |
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| 125 | + int ret; |
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| 126 | + |
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| 127 | + ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios); |
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| 128 | + if (ret) |
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| 129 | + dev_warn(dev, "can't add GPIO ACPI mapping\n"); |
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| 130 | + |
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| 131 | + ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); |
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| 132 | + if (ret < 0) |
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| 133 | + return ret; |
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| 134 | + |
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| 135 | + dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret); |
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| 136 | + return ret; |
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| 137 | +} |
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| 138 | + |
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| 139 | +static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = { |
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| 140 | + { |
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| 141 | + /* |
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| 142 | + * On Intel Galileo Gen 2 board the IRQ pin of one of |
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| 143 | + * the I²C GPIO expanders, which has GpioInt() resource, |
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| 144 | + * is provided as an absolute number instead of being |
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| 145 | + * relative. Since first controller (gpio-sch.c) and |
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| 146 | + * second (gpio-dwapb.c) are at the fixed bases, we may |
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| 147 | + * safely refer to the number in the global space to get |
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| 148 | + * an IRQ out of it. |
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| 149 | + */ |
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| 150 | + .matches = { |
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| 151 | + DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), |
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| 152 | + }, |
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| 153 | + }, |
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| 154 | + {} |
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| 155 | +}; |
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| 156 | +#endif |
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| 157 | + |
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107 | 158 | static const struct acpi_device_id pca953x_acpi_ids[] = { |
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108 | | - { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, |
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| 159 | + { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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109 | 160 | { } |
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110 | 161 | }; |
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111 | 162 | MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); |
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112 | 163 | |
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113 | 164 | #define MAX_BANK 5 |
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114 | 165 | #define BANK_SZ 8 |
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| 166 | +#define MAX_LINE (MAX_BANK * BANK_SZ) |
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115 | 167 | |
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116 | 168 | #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) |
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117 | 169 | |
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.. | .. |
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119 | 171 | int direction; |
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120 | 172 | int output; |
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121 | 173 | int input; |
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| 174 | + int invert; |
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122 | 175 | }; |
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123 | 176 | |
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124 | 177 | static const struct pca953x_reg_config pca953x_regs = { |
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125 | 178 | .direction = PCA953X_DIRECTION, |
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126 | 179 | .output = PCA953X_OUTPUT, |
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127 | 180 | .input = PCA953X_INPUT, |
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| 181 | + .invert = PCA953X_INVERT, |
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128 | 182 | }; |
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129 | 183 | |
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130 | 184 | static const struct pca953x_reg_config pca957x_regs = { |
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131 | 185 | .direction = PCA957X_CFG, |
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132 | 186 | .output = PCA957X_OUT, |
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133 | 187 | .input = PCA957X_IN, |
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| 188 | + .invert = PCA957X_INVRT, |
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134 | 189 | }; |
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135 | 190 | |
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136 | 191 | struct pca953x_chip { |
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137 | 192 | unsigned gpio_start; |
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138 | | - u8 reg_output[MAX_BANK]; |
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139 | | - u8 reg_direction[MAX_BANK]; |
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140 | 193 | struct mutex i2c_lock; |
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| 194 | + struct regmap *regmap; |
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141 | 195 | |
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142 | 196 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
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143 | 197 | struct mutex irq_lock; |
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144 | | - u8 irq_mask[MAX_BANK]; |
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145 | | - u8 irq_stat[MAX_BANK]; |
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146 | | - u8 irq_trig_raise[MAX_BANK]; |
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147 | | - u8 irq_trig_fall[MAX_BANK]; |
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| 198 | + DECLARE_BITMAP(irq_mask, MAX_LINE); |
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| 199 | + DECLARE_BITMAP(irq_stat, MAX_LINE); |
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| 200 | + DECLARE_BITMAP(irq_trig_raise, MAX_LINE); |
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| 201 | + DECLARE_BITMAP(irq_trig_fall, MAX_LINE); |
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| 202 | + struct irq_chip irq_chip; |
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148 | 203 | #endif |
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| 204 | + atomic_t wakeup_path; |
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149 | 205 | |
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150 | 206 | struct i2c_client *client; |
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151 | 207 | struct gpio_chip gpio_chip; |
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.. | .. |
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154 | 210 | struct regulator *regulator; |
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155 | 211 | |
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156 | 212 | const struct pca953x_reg_config *regs; |
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157 | | - |
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158 | | - int (*write_regs)(struct pca953x_chip *, int, u8 *); |
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159 | | - int (*read_regs)(struct pca953x_chip *, int, u8 *); |
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160 | 213 | }; |
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161 | 214 | |
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162 | | -static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, |
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163 | | - int off) |
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| 215 | +static int pca953x_bank_shift(struct pca953x_chip *chip) |
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164 | 216 | { |
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165 | | - int ret; |
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166 | | - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
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167 | | - int offset = off / BANK_SZ; |
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168 | | - |
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169 | | - ret = i2c_smbus_read_byte_data(chip->client, |
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170 | | - (reg << bank_shift) + offset); |
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171 | | - *val = ret; |
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172 | | - |
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173 | | - if (ret < 0) { |
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174 | | - dev_err(&chip->client->dev, "failed reading register\n"); |
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175 | | - return ret; |
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176 | | - } |
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177 | | - |
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178 | | - return 0; |
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| 217 | + return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
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179 | 218 | } |
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180 | 219 | |
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181 | | -static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, |
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182 | | - int off) |
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| 220 | +#define PCA953x_BANK_INPUT BIT(0) |
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| 221 | +#define PCA953x_BANK_OUTPUT BIT(1) |
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| 222 | +#define PCA953x_BANK_POLARITY BIT(2) |
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| 223 | +#define PCA953x_BANK_CONFIG BIT(3) |
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| 224 | + |
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| 225 | +#define PCA957x_BANK_INPUT BIT(0) |
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| 226 | +#define PCA957x_BANK_POLARITY BIT(1) |
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| 227 | +#define PCA957x_BANK_BUSHOLD BIT(2) |
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| 228 | +#define PCA957x_BANK_CONFIG BIT(4) |
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| 229 | +#define PCA957x_BANK_OUTPUT BIT(5) |
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| 230 | + |
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| 231 | +#define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) |
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| 232 | +#define PCAL9xxx_BANK_PULL_EN BIT(8 + 3) |
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| 233 | +#define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4) |
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| 234 | +#define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) |
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| 235 | +#define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) |
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| 236 | + |
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| 237 | +/* |
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| 238 | + * We care about the following registers: |
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| 239 | + * - Standard set, below 0x40, each port can be replicated up to 8 times |
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| 240 | + * - PCA953x standard |
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| 241 | + * Input port 0x00 + 0 * bank_size R |
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| 242 | + * Output port 0x00 + 1 * bank_size RW |
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| 243 | + * Polarity Inversion port 0x00 + 2 * bank_size RW |
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| 244 | + * Configuration port 0x00 + 3 * bank_size RW |
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| 245 | + * - PCA957x with mixed up registers |
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| 246 | + * Input port 0x00 + 0 * bank_size R |
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| 247 | + * Polarity Inversion port 0x00 + 1 * bank_size RW |
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| 248 | + * Bus hold port 0x00 + 2 * bank_size RW |
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| 249 | + * Configuration port 0x00 + 4 * bank_size RW |
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| 250 | + * Output port 0x00 + 5 * bank_size RW |
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| 251 | + * |
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| 252 | + * - Extended set, above 0x40, often chip specific. |
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| 253 | + * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: |
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| 254 | + * Input latch register 0x40 + 2 * bank_size RW |
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| 255 | + * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW |
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| 256 | + * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW |
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| 257 | + * Interrupt mask register 0x40 + 5 * bank_size RW |
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| 258 | + * Interrupt status register 0x40 + 6 * bank_size R |
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| 259 | + * |
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| 260 | + * - Registers with bit 0x80 set, the AI bit |
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| 261 | + * The bit is cleared and the registers fall into one of the |
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| 262 | + * categories above. |
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| 263 | + */ |
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| 264 | + |
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| 265 | +static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, |
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| 266 | + u32 checkbank) |
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183 | 267 | { |
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184 | | - int ret; |
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185 | | - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
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186 | | - int offset = off / BANK_SZ; |
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| 268 | + int bank_shift = pca953x_bank_shift(chip); |
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| 269 | + int bank = (reg & REG_ADDR_MASK) >> bank_shift; |
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| 270 | + int offset = reg & (BIT(bank_shift) - 1); |
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187 | 271 | |
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188 | | - ret = i2c_smbus_write_byte_data(chip->client, |
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189 | | - (reg << bank_shift) + offset, val); |
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| 272 | + /* Special PCAL extended register check. */ |
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| 273 | + if (reg & REG_ADDR_EXT) { |
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| 274 | + if (!(chip->driver_data & PCA_PCAL)) |
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| 275 | + return false; |
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| 276 | + bank += 8; |
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| 277 | + } |
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190 | 278 | |
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| 279 | + /* Register is not in the matching bank. */ |
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| 280 | + if (!(BIT(bank) & checkbank)) |
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| 281 | + return false; |
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| 282 | + |
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| 283 | + /* Register is not within allowed range of bank. */ |
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| 284 | + if (offset >= NBANK(chip)) |
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| 285 | + return false; |
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| 286 | + |
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| 287 | + return true; |
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| 288 | +} |
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| 289 | + |
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| 290 | +static bool pca953x_readable_register(struct device *dev, unsigned int reg) |
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| 291 | +{ |
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| 292 | + struct pca953x_chip *chip = dev_get_drvdata(dev); |
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| 293 | + u32 bank; |
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| 294 | + |
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| 295 | + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { |
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| 296 | + bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | |
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| 297 | + PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; |
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| 298 | + } else { |
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| 299 | + bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | |
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| 300 | + PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | |
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| 301 | + PCA957x_BANK_BUSHOLD; |
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| 302 | + } |
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| 303 | + |
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| 304 | + if (chip->driver_data & PCA_PCAL) { |
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| 305 | + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | |
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| 306 | + PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK | |
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| 307 | + PCAL9xxx_BANK_IRQ_STAT; |
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| 308 | + } |
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| 309 | + |
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| 310 | + return pca953x_check_register(chip, reg, bank); |
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| 311 | +} |
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| 312 | + |
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| 313 | +static bool pca953x_writeable_register(struct device *dev, unsigned int reg) |
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| 314 | +{ |
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| 315 | + struct pca953x_chip *chip = dev_get_drvdata(dev); |
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| 316 | + u32 bank; |
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| 317 | + |
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| 318 | + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { |
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| 319 | + bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | |
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| 320 | + PCA953x_BANK_CONFIG; |
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| 321 | + } else { |
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| 322 | + bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | |
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| 323 | + PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; |
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| 324 | + } |
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| 325 | + |
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| 326 | + if (chip->driver_data & PCA_PCAL) |
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| 327 | + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | |
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| 328 | + PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK; |
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| 329 | + |
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| 330 | + return pca953x_check_register(chip, reg, bank); |
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| 331 | +} |
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| 332 | + |
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| 333 | +static bool pca953x_volatile_register(struct device *dev, unsigned int reg) |
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| 334 | +{ |
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| 335 | + struct pca953x_chip *chip = dev_get_drvdata(dev); |
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| 336 | + u32 bank; |
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| 337 | + |
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| 338 | + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) |
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| 339 | + bank = PCA953x_BANK_INPUT; |
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| 340 | + else |
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| 341 | + bank = PCA957x_BANK_INPUT; |
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| 342 | + |
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| 343 | + if (chip->driver_data & PCA_PCAL) |
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| 344 | + bank |= PCAL9xxx_BANK_IRQ_STAT; |
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| 345 | + |
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| 346 | + return pca953x_check_register(chip, reg, bank); |
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| 347 | +} |
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| 348 | + |
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| 349 | +static const struct regmap_config pca953x_i2c_regmap = { |
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| 350 | + .reg_bits = 8, |
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| 351 | + .val_bits = 8, |
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| 352 | + |
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| 353 | + .use_single_read = true, |
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| 354 | + .use_single_write = true, |
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| 355 | + |
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| 356 | + .readable_reg = pca953x_readable_register, |
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| 357 | + .writeable_reg = pca953x_writeable_register, |
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| 358 | + .volatile_reg = pca953x_volatile_register, |
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| 359 | + |
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| 360 | + .disable_locking = true, |
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| 361 | + .cache_type = REGCACHE_RBTREE, |
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| 362 | + .max_register = 0x7f, |
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| 363 | +}; |
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| 364 | + |
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| 365 | +static const struct regmap_config pca953x_ai_i2c_regmap = { |
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| 366 | + .reg_bits = 8, |
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| 367 | + .val_bits = 8, |
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| 368 | + |
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| 369 | + .read_flag_mask = REG_ADDR_AI, |
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| 370 | + .write_flag_mask = REG_ADDR_AI, |
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| 371 | + |
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| 372 | + .readable_reg = pca953x_readable_register, |
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| 373 | + .writeable_reg = pca953x_writeable_register, |
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| 374 | + .volatile_reg = pca953x_volatile_register, |
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| 375 | + |
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| 376 | + .disable_locking = true, |
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| 377 | + .cache_type = REGCACHE_RBTREE, |
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| 378 | + .max_register = 0x7f, |
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| 379 | +}; |
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| 380 | + |
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| 381 | +static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off) |
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| 382 | +{ |
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| 383 | + int bank_shift = pca953x_bank_shift(chip); |
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| 384 | + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; |
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| 385 | + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; |
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| 386 | + u8 regaddr = pinctrl | addr | (off / BANK_SZ); |
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| 387 | + |
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| 388 | + return regaddr; |
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| 389 | +} |
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| 390 | + |
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| 391 | +static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val) |
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| 392 | +{ |
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| 393 | + u8 regaddr = pca953x_recalc_addr(chip, reg, 0); |
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| 394 | + u8 value[MAX_BANK]; |
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| 395 | + int i, ret; |
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| 396 | + |
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| 397 | + for (i = 0; i < NBANK(chip); i++) |
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| 398 | + value[i] = bitmap_get_value8(val, i * BANK_SZ); |
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| 399 | + |
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| 400 | + ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip)); |
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191 | 401 | if (ret < 0) { |
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192 | 402 | dev_err(&chip->client->dev, "failed writing register\n"); |
---|
193 | 403 | return ret; |
---|
.. | .. |
---|
196 | 406 | return 0; |
---|
197 | 407 | } |
---|
198 | 408 | |
---|
199 | | -static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) |
---|
| 409 | +static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val) |
---|
200 | 410 | { |
---|
201 | | - return i2c_smbus_write_byte_data(chip->client, reg, *val); |
---|
202 | | -} |
---|
| 411 | + u8 regaddr = pca953x_recalc_addr(chip, reg, 0); |
---|
| 412 | + u8 value[MAX_BANK]; |
---|
| 413 | + int i, ret; |
---|
203 | 414 | |
---|
204 | | -static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) |
---|
205 | | -{ |
---|
206 | | - u16 word = get_unaligned((u16 *)val); |
---|
207 | | - |
---|
208 | | - return i2c_smbus_write_word_data(chip->client, reg << 1, word); |
---|
209 | | -} |
---|
210 | | - |
---|
211 | | -static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) |
---|
212 | | -{ |
---|
213 | | - int ret; |
---|
214 | | - |
---|
215 | | - ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]); |
---|
216 | | - if (ret < 0) |
---|
217 | | - return ret; |
---|
218 | | - |
---|
219 | | - return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]); |
---|
220 | | -} |
---|
221 | | - |
---|
222 | | -static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) |
---|
223 | | -{ |
---|
224 | | - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
---|
225 | | - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; |
---|
226 | | - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; |
---|
227 | | - |
---|
228 | | - return i2c_smbus_write_i2c_block_data(chip->client, |
---|
229 | | - pinctrl | addr | REG_ADDR_AI, |
---|
230 | | - NBANK(chip), val); |
---|
231 | | -} |
---|
232 | | - |
---|
233 | | -static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) |
---|
234 | | -{ |
---|
235 | | - int ret = 0; |
---|
236 | | - |
---|
237 | | - ret = chip->write_regs(chip, reg, val); |
---|
238 | | - if (ret < 0) { |
---|
239 | | - dev_err(&chip->client->dev, "failed writing register\n"); |
---|
240 | | - return ret; |
---|
241 | | - } |
---|
242 | | - |
---|
243 | | - return 0; |
---|
244 | | -} |
---|
245 | | - |
---|
246 | | -static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) |
---|
247 | | -{ |
---|
248 | | - int ret; |
---|
249 | | - |
---|
250 | | - ret = i2c_smbus_read_byte_data(chip->client, reg); |
---|
251 | | - *val = ret; |
---|
252 | | - |
---|
253 | | - return ret; |
---|
254 | | -} |
---|
255 | | - |
---|
256 | | -static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) |
---|
257 | | -{ |
---|
258 | | - int ret; |
---|
259 | | - |
---|
260 | | - ret = i2c_smbus_read_word_data(chip->client, reg << 1); |
---|
261 | | - put_unaligned(ret, (u16 *)val); |
---|
262 | | - |
---|
263 | | - return ret; |
---|
264 | | -} |
---|
265 | | - |
---|
266 | | -static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) |
---|
267 | | -{ |
---|
268 | | - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
---|
269 | | - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; |
---|
270 | | - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; |
---|
271 | | - |
---|
272 | | - return i2c_smbus_read_i2c_block_data(chip->client, |
---|
273 | | - pinctrl | addr | REG_ADDR_AI, |
---|
274 | | - NBANK(chip), val); |
---|
275 | | -} |
---|
276 | | - |
---|
277 | | -static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) |
---|
278 | | -{ |
---|
279 | | - int ret; |
---|
280 | | - |
---|
281 | | - ret = chip->read_regs(chip, reg, val); |
---|
| 415 | + ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip)); |
---|
282 | 416 | if (ret < 0) { |
---|
283 | 417 | dev_err(&chip->client->dev, "failed reading register\n"); |
---|
284 | 418 | return ret; |
---|
285 | 419 | } |
---|
| 420 | + |
---|
| 421 | + for (i = 0; i < NBANK(chip); i++) |
---|
| 422 | + bitmap_set_value8(val, value[i], i * BANK_SZ); |
---|
286 | 423 | |
---|
287 | 424 | return 0; |
---|
288 | 425 | } |
---|
.. | .. |
---|
290 | 427 | static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
---|
291 | 428 | { |
---|
292 | 429 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
293 | | - u8 reg_val; |
---|
| 430 | + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); |
---|
| 431 | + u8 bit = BIT(off % BANK_SZ); |
---|
294 | 432 | int ret; |
---|
295 | 433 | |
---|
296 | 434 | mutex_lock(&chip->i2c_lock); |
---|
297 | | - reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); |
---|
298 | | - |
---|
299 | | - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); |
---|
300 | | - if (ret) |
---|
301 | | - goto exit; |
---|
302 | | - |
---|
303 | | - chip->reg_direction[off / BANK_SZ] = reg_val; |
---|
304 | | -exit: |
---|
| 435 | + ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); |
---|
305 | 436 | mutex_unlock(&chip->i2c_lock); |
---|
306 | 437 | return ret; |
---|
307 | 438 | } |
---|
.. | .. |
---|
310 | 441 | unsigned off, int val) |
---|
311 | 442 | { |
---|
312 | 443 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
313 | | - u8 reg_val; |
---|
| 444 | + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); |
---|
| 445 | + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); |
---|
| 446 | + u8 bit = BIT(off % BANK_SZ); |
---|
314 | 447 | int ret; |
---|
315 | 448 | |
---|
316 | 449 | mutex_lock(&chip->i2c_lock); |
---|
317 | 450 | /* set output level */ |
---|
318 | | - if (val) |
---|
319 | | - reg_val = chip->reg_output[off / BANK_SZ] |
---|
320 | | - | (1u << (off % BANK_SZ)); |
---|
321 | | - else |
---|
322 | | - reg_val = chip->reg_output[off / BANK_SZ] |
---|
323 | | - & ~(1u << (off % BANK_SZ)); |
---|
324 | | - |
---|
325 | | - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); |
---|
| 451 | + ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); |
---|
326 | 452 | if (ret) |
---|
327 | 453 | goto exit; |
---|
328 | | - |
---|
329 | | - chip->reg_output[off / BANK_SZ] = reg_val; |
---|
330 | 454 | |
---|
331 | 455 | /* then direction */ |
---|
332 | | - reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); |
---|
333 | | - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); |
---|
334 | | - if (ret) |
---|
335 | | - goto exit; |
---|
336 | | - |
---|
337 | | - chip->reg_direction[off / BANK_SZ] = reg_val; |
---|
| 456 | + ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); |
---|
338 | 457 | exit: |
---|
339 | 458 | mutex_unlock(&chip->i2c_lock); |
---|
340 | 459 | return ret; |
---|
.. | .. |
---|
343 | 462 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
---|
344 | 463 | { |
---|
345 | 464 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
| 465 | + u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off); |
---|
| 466 | + u8 bit = BIT(off % BANK_SZ); |
---|
346 | 467 | u32 reg_val; |
---|
347 | 468 | int ret; |
---|
348 | 469 | |
---|
349 | 470 | mutex_lock(&chip->i2c_lock); |
---|
350 | | - ret = pca953x_read_single(chip, chip->regs->input, ®_val, off); |
---|
| 471 | + ret = regmap_read(chip->regmap, inreg, ®_val); |
---|
351 | 472 | mutex_unlock(&chip->i2c_lock); |
---|
352 | | - if (ret < 0) { |
---|
353 | | - /* NOTE: diagnostic already emitted; that's all we should |
---|
354 | | - * do unless gpio_*_value_cansleep() calls become different |
---|
355 | | - * from their nonsleeping siblings (and report faults). |
---|
356 | | - */ |
---|
357 | | - return 0; |
---|
358 | | - } |
---|
| 473 | + if (ret < 0) |
---|
| 474 | + return ret; |
---|
359 | 475 | |
---|
360 | | - return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; |
---|
| 476 | + return !!(reg_val & bit); |
---|
361 | 477 | } |
---|
362 | 478 | |
---|
363 | 479 | static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
---|
364 | 480 | { |
---|
365 | 481 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
366 | | - u8 reg_val; |
---|
367 | | - int ret; |
---|
| 482 | + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); |
---|
| 483 | + u8 bit = BIT(off % BANK_SZ); |
---|
368 | 484 | |
---|
369 | 485 | mutex_lock(&chip->i2c_lock); |
---|
370 | | - if (val) |
---|
371 | | - reg_val = chip->reg_output[off / BANK_SZ] |
---|
372 | | - | (1u << (off % BANK_SZ)); |
---|
373 | | - else |
---|
374 | | - reg_val = chip->reg_output[off / BANK_SZ] |
---|
375 | | - & ~(1u << (off % BANK_SZ)); |
---|
376 | | - |
---|
377 | | - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); |
---|
378 | | - if (ret) |
---|
379 | | - goto exit; |
---|
380 | | - |
---|
381 | | - chip->reg_output[off / BANK_SZ] = reg_val; |
---|
382 | | -exit: |
---|
| 486 | + regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); |
---|
383 | 487 | mutex_unlock(&chip->i2c_lock); |
---|
384 | 488 | } |
---|
385 | 489 | |
---|
386 | 490 | static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) |
---|
387 | 491 | { |
---|
388 | 492 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
| 493 | + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); |
---|
| 494 | + u8 bit = BIT(off % BANK_SZ); |
---|
389 | 495 | u32 reg_val; |
---|
390 | 496 | int ret; |
---|
391 | 497 | |
---|
392 | 498 | mutex_lock(&chip->i2c_lock); |
---|
393 | | - ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off); |
---|
| 499 | + ret = regmap_read(chip->regmap, dirreg, ®_val); |
---|
394 | 500 | mutex_unlock(&chip->i2c_lock); |
---|
395 | 501 | if (ret < 0) |
---|
396 | 502 | return ret; |
---|
397 | 503 | |
---|
398 | | - return !!(reg_val & (1u << (off % BANK_SZ))); |
---|
| 504 | + if (reg_val & bit) |
---|
| 505 | + return GPIO_LINE_DIRECTION_IN; |
---|
| 506 | + |
---|
| 507 | + return GPIO_LINE_DIRECTION_OUT; |
---|
| 508 | +} |
---|
| 509 | + |
---|
| 510 | +static int pca953x_gpio_get_multiple(struct gpio_chip *gc, |
---|
| 511 | + unsigned long *mask, unsigned long *bits) |
---|
| 512 | +{ |
---|
| 513 | + struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
| 514 | + DECLARE_BITMAP(reg_val, MAX_LINE); |
---|
| 515 | + int ret; |
---|
| 516 | + |
---|
| 517 | + mutex_lock(&chip->i2c_lock); |
---|
| 518 | + ret = pca953x_read_regs(chip, chip->regs->input, reg_val); |
---|
| 519 | + mutex_unlock(&chip->i2c_lock); |
---|
| 520 | + if (ret) |
---|
| 521 | + return ret; |
---|
| 522 | + |
---|
| 523 | + bitmap_replace(bits, bits, reg_val, mask, gc->ngpio); |
---|
| 524 | + return 0; |
---|
399 | 525 | } |
---|
400 | 526 | |
---|
401 | 527 | static void pca953x_gpio_set_multiple(struct gpio_chip *gc, |
---|
402 | 528 | unsigned long *mask, unsigned long *bits) |
---|
403 | 529 | { |
---|
404 | 530 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
405 | | - unsigned int bank_mask, bank_val; |
---|
406 | | - int bank_shift, bank; |
---|
407 | | - u8 reg_val[MAX_BANK]; |
---|
| 531 | + DECLARE_BITMAP(reg_val, MAX_LINE); |
---|
408 | 532 | int ret; |
---|
409 | 533 | |
---|
410 | | - bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
---|
411 | | - |
---|
412 | 534 | mutex_lock(&chip->i2c_lock); |
---|
413 | | - memcpy(reg_val, chip->reg_output, NBANK(chip)); |
---|
414 | | - for (bank = 0; bank < NBANK(chip); bank++) { |
---|
415 | | - bank_mask = mask[bank / sizeof(*mask)] >> |
---|
416 | | - ((bank % sizeof(*mask)) * 8); |
---|
417 | | - if (bank_mask) { |
---|
418 | | - bank_val = bits[bank / sizeof(*bits)] >> |
---|
419 | | - ((bank % sizeof(*bits)) * 8); |
---|
420 | | - bank_val &= bank_mask; |
---|
421 | | - reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val; |
---|
422 | | - } |
---|
423 | | - } |
---|
424 | | - |
---|
425 | | - ret = i2c_smbus_write_i2c_block_data(chip->client, |
---|
426 | | - chip->regs->output << bank_shift, |
---|
427 | | - NBANK(chip), reg_val); |
---|
| 535 | + ret = pca953x_read_regs(chip, chip->regs->output, reg_val); |
---|
428 | 536 | if (ret) |
---|
429 | 537 | goto exit; |
---|
430 | 538 | |
---|
431 | | - memcpy(chip->reg_output, reg_val, NBANK(chip)); |
---|
| 539 | + bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio); |
---|
| 540 | + |
---|
| 541 | + pca953x_write_regs(chip, chip->regs->output, reg_val); |
---|
432 | 542 | exit: |
---|
433 | 543 | mutex_unlock(&chip->i2c_lock); |
---|
| 544 | +} |
---|
| 545 | + |
---|
| 546 | +static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip, |
---|
| 547 | + unsigned int offset, |
---|
| 548 | + unsigned long config) |
---|
| 549 | +{ |
---|
| 550 | + u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset); |
---|
| 551 | + u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset); |
---|
| 552 | + u8 bit = BIT(offset % BANK_SZ); |
---|
| 553 | + int ret; |
---|
| 554 | + |
---|
| 555 | + /* |
---|
| 556 | + * pull-up/pull-down configuration requires PCAL extended |
---|
| 557 | + * registers |
---|
| 558 | + */ |
---|
| 559 | + if (!(chip->driver_data & PCA_PCAL)) |
---|
| 560 | + return -ENOTSUPP; |
---|
| 561 | + |
---|
| 562 | + mutex_lock(&chip->i2c_lock); |
---|
| 563 | + |
---|
| 564 | + /* Configure pull-up/pull-down */ |
---|
| 565 | + if (config == PIN_CONFIG_BIAS_PULL_UP) |
---|
| 566 | + ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit); |
---|
| 567 | + else if (config == PIN_CONFIG_BIAS_PULL_DOWN) |
---|
| 568 | + ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0); |
---|
| 569 | + else |
---|
| 570 | + ret = 0; |
---|
| 571 | + if (ret) |
---|
| 572 | + goto exit; |
---|
| 573 | + |
---|
| 574 | + /* Disable/Enable pull-up/pull-down */ |
---|
| 575 | + if (config == PIN_CONFIG_BIAS_DISABLE) |
---|
| 576 | + ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); |
---|
| 577 | + else |
---|
| 578 | + ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); |
---|
| 579 | + |
---|
| 580 | +exit: |
---|
| 581 | + mutex_unlock(&chip->i2c_lock); |
---|
| 582 | + return ret; |
---|
| 583 | +} |
---|
| 584 | + |
---|
| 585 | +static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset, |
---|
| 586 | + unsigned long config) |
---|
| 587 | +{ |
---|
| 588 | + struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
| 589 | + |
---|
| 590 | + switch (pinconf_to_config_param(config)) { |
---|
| 591 | + case PIN_CONFIG_BIAS_PULL_UP: |
---|
| 592 | + case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: |
---|
| 593 | + case PIN_CONFIG_BIAS_PULL_DOWN: |
---|
| 594 | + case PIN_CONFIG_BIAS_DISABLE: |
---|
| 595 | + return pca953x_gpio_set_pull_up_down(chip, offset, config); |
---|
| 596 | + default: |
---|
| 597 | + return -ENOTSUPP; |
---|
| 598 | + } |
---|
434 | 599 | } |
---|
435 | 600 | |
---|
436 | 601 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
---|
.. | .. |
---|
444 | 609 | gc->get = pca953x_gpio_get_value; |
---|
445 | 610 | gc->set = pca953x_gpio_set_value; |
---|
446 | 611 | gc->get_direction = pca953x_gpio_get_direction; |
---|
| 612 | + gc->get_multiple = pca953x_gpio_get_multiple; |
---|
447 | 613 | gc->set_multiple = pca953x_gpio_set_multiple; |
---|
| 614 | + gc->set_config = pca953x_gpio_set_config; |
---|
448 | 615 | gc->can_sleep = true; |
---|
449 | 616 | |
---|
450 | 617 | gc->base = chip->gpio_start; |
---|
451 | 618 | gc->ngpio = gpios; |
---|
452 | | - gc->label = chip->client->name; |
---|
| 619 | + gc->label = dev_name(&chip->client->dev); |
---|
453 | 620 | gc->parent = &chip->client->dev; |
---|
454 | 621 | gc->owner = THIS_MODULE; |
---|
455 | 622 | gc->names = chip->names; |
---|
.. | .. |
---|
460 | 627 | { |
---|
461 | 628 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
---|
462 | 629 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
| 630 | + irq_hw_number_t hwirq = irqd_to_hwirq(d); |
---|
463 | 631 | |
---|
464 | | - chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); |
---|
| 632 | + clear_bit(hwirq, chip->irq_mask); |
---|
465 | 633 | } |
---|
466 | 634 | |
---|
467 | 635 | static void pca953x_irq_unmask(struct irq_data *d) |
---|
468 | 636 | { |
---|
469 | 637 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
---|
470 | 638 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
| 639 | + irq_hw_number_t hwirq = irqd_to_hwirq(d); |
---|
471 | 640 | |
---|
472 | | - chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); |
---|
| 641 | + set_bit(hwirq, chip->irq_mask); |
---|
| 642 | +} |
---|
| 643 | + |
---|
| 644 | +static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on) |
---|
| 645 | +{ |
---|
| 646 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
---|
| 647 | + struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
| 648 | + |
---|
| 649 | + if (on) |
---|
| 650 | + atomic_inc(&chip->wakeup_path); |
---|
| 651 | + else |
---|
| 652 | + atomic_dec(&chip->wakeup_path); |
---|
| 653 | + |
---|
| 654 | + return irq_set_irq_wake(chip->client->irq, on); |
---|
473 | 655 | } |
---|
474 | 656 | |
---|
475 | 657 | static void pca953x_irq_bus_lock(struct irq_data *d) |
---|
.. | .. |
---|
484 | 666 | { |
---|
485 | 667 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
---|
486 | 668 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
487 | | - u8 new_irqs; |
---|
488 | | - int level, i; |
---|
489 | | - u8 invert_irq_mask[MAX_BANK]; |
---|
| 669 | + DECLARE_BITMAP(irq_mask, MAX_LINE); |
---|
| 670 | + DECLARE_BITMAP(reg_direction, MAX_LINE); |
---|
| 671 | + int level; |
---|
490 | 672 | |
---|
491 | 673 | if (chip->driver_data & PCA_PCAL) { |
---|
492 | 674 | /* Enable latch on interrupt-enabled inputs */ |
---|
493 | 675 | pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); |
---|
494 | 676 | |
---|
495 | | - for (i = 0; i < NBANK(chip); i++) |
---|
496 | | - invert_irq_mask[i] = ~chip->irq_mask[i]; |
---|
| 677 | + bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); |
---|
497 | 678 | |
---|
498 | 679 | /* Unmask enabled interrupts */ |
---|
499 | | - pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask); |
---|
| 680 | + pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); |
---|
500 | 681 | } |
---|
| 682 | + |
---|
| 683 | + /* Switch direction to input if needed */ |
---|
| 684 | + pca953x_read_regs(chip, chip->regs->direction, reg_direction); |
---|
| 685 | + |
---|
| 686 | + bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); |
---|
| 687 | + bitmap_complement(reg_direction, reg_direction, gc->ngpio); |
---|
| 688 | + bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); |
---|
501 | 689 | |
---|
502 | 690 | /* Look for any newly setup interrupt */ |
---|
503 | | - for (i = 0; i < NBANK(chip); i++) { |
---|
504 | | - new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; |
---|
505 | | - new_irqs &= ~chip->reg_direction[i]; |
---|
506 | | - |
---|
507 | | - while (new_irqs) { |
---|
508 | | - level = __ffs(new_irqs); |
---|
509 | | - pca953x_gpio_direction_input(&chip->gpio_chip, |
---|
510 | | - level + (BANK_SZ * i)); |
---|
511 | | - new_irqs &= ~(1 << level); |
---|
512 | | - } |
---|
513 | | - } |
---|
| 691 | + for_each_set_bit(level, irq_mask, gc->ngpio) |
---|
| 692 | + pca953x_gpio_direction_input(&chip->gpio_chip, level); |
---|
514 | 693 | |
---|
515 | 694 | mutex_unlock(&chip->irq_lock); |
---|
516 | 695 | } |
---|
.. | .. |
---|
519 | 698 | { |
---|
520 | 699 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
---|
521 | 700 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
522 | | - int bank_nb = d->hwirq / BANK_SZ; |
---|
523 | | - u8 mask = 1 << (d->hwirq % BANK_SZ); |
---|
| 701 | + irq_hw_number_t hwirq = irqd_to_hwirq(d); |
---|
524 | 702 | |
---|
525 | 703 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { |
---|
526 | 704 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", |
---|
.. | .. |
---|
528 | 706 | return -EINVAL; |
---|
529 | 707 | } |
---|
530 | 708 | |
---|
531 | | - if (type & IRQ_TYPE_EDGE_FALLING) |
---|
532 | | - chip->irq_trig_fall[bank_nb] |= mask; |
---|
533 | | - else |
---|
534 | | - chip->irq_trig_fall[bank_nb] &= ~mask; |
---|
535 | | - |
---|
536 | | - if (type & IRQ_TYPE_EDGE_RISING) |
---|
537 | | - chip->irq_trig_raise[bank_nb] |= mask; |
---|
538 | | - else |
---|
539 | | - chip->irq_trig_raise[bank_nb] &= ~mask; |
---|
| 709 | + assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING); |
---|
| 710 | + assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING); |
---|
540 | 711 | |
---|
541 | 712 | return 0; |
---|
542 | 713 | } |
---|
.. | .. |
---|
545 | 716 | { |
---|
546 | 717 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
---|
547 | 718 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
---|
548 | | - u8 mask = 1 << (d->hwirq % BANK_SZ); |
---|
| 719 | + irq_hw_number_t hwirq = irqd_to_hwirq(d); |
---|
549 | 720 | |
---|
550 | | - chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask; |
---|
551 | | - chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask; |
---|
| 721 | + clear_bit(hwirq, chip->irq_trig_raise); |
---|
| 722 | + clear_bit(hwirq, chip->irq_trig_fall); |
---|
552 | 723 | } |
---|
553 | 724 | |
---|
554 | | -static struct irq_chip pca953x_irq_chip = { |
---|
555 | | - .name = "pca953x", |
---|
556 | | - .irq_mask = pca953x_irq_mask, |
---|
557 | | - .irq_unmask = pca953x_irq_unmask, |
---|
558 | | - .irq_bus_lock = pca953x_irq_bus_lock, |
---|
559 | | - .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, |
---|
560 | | - .irq_set_type = pca953x_irq_set_type, |
---|
561 | | - .irq_shutdown = pca953x_irq_shutdown, |
---|
562 | | -}; |
---|
563 | | - |
---|
564 | | -static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) |
---|
| 725 | +static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending) |
---|
565 | 726 | { |
---|
566 | | - u8 cur_stat[MAX_BANK]; |
---|
567 | | - u8 old_stat[MAX_BANK]; |
---|
568 | | - bool pending_seen = false; |
---|
569 | | - bool trigger_seen = false; |
---|
570 | | - u8 trigger[MAX_BANK]; |
---|
571 | | - int ret, i; |
---|
| 727 | + struct gpio_chip *gc = &chip->gpio_chip; |
---|
| 728 | + DECLARE_BITMAP(reg_direction, MAX_LINE); |
---|
| 729 | + DECLARE_BITMAP(old_stat, MAX_LINE); |
---|
| 730 | + DECLARE_BITMAP(cur_stat, MAX_LINE); |
---|
| 731 | + DECLARE_BITMAP(new_stat, MAX_LINE); |
---|
| 732 | + DECLARE_BITMAP(trigger, MAX_LINE); |
---|
| 733 | + int ret; |
---|
572 | 734 | |
---|
573 | 735 | if (chip->driver_data & PCA_PCAL) { |
---|
574 | 736 | /* Read the current interrupt status from the device */ |
---|
.. | .. |
---|
577 | 739 | return false; |
---|
578 | 740 | |
---|
579 | 741 | /* Check latched inputs and clear interrupt status */ |
---|
580 | | - ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat); |
---|
| 742 | + ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); |
---|
581 | 743 | if (ret) |
---|
582 | 744 | return false; |
---|
583 | 745 | |
---|
584 | | - for (i = 0; i < NBANK(chip); i++) { |
---|
585 | | - /* Apply filter for rising/falling edge selection */ |
---|
586 | | - pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) | |
---|
587 | | - (cur_stat[i] & chip->irq_trig_raise[i]); |
---|
588 | | - pending[i] &= trigger[i]; |
---|
589 | | - if (pending[i]) |
---|
590 | | - pending_seen = true; |
---|
591 | | - } |
---|
| 746 | + /* Apply filter for rising/falling edge selection */ |
---|
| 747 | + bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio); |
---|
592 | 748 | |
---|
593 | | - return pending_seen; |
---|
| 749 | + bitmap_and(pending, new_stat, trigger, gc->ngpio); |
---|
| 750 | + |
---|
| 751 | + return !bitmap_empty(pending, gc->ngpio); |
---|
594 | 752 | } |
---|
595 | 753 | |
---|
596 | 754 | ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); |
---|
.. | .. |
---|
598 | 756 | return false; |
---|
599 | 757 | |
---|
600 | 758 | /* Remove output pins from the equation */ |
---|
601 | | - for (i = 0; i < NBANK(chip); i++) |
---|
602 | | - cur_stat[i] &= chip->reg_direction[i]; |
---|
| 759 | + pca953x_read_regs(chip, chip->regs->direction, reg_direction); |
---|
603 | 760 | |
---|
604 | | - memcpy(old_stat, chip->irq_stat, NBANK(chip)); |
---|
| 761 | + bitmap_copy(old_stat, chip->irq_stat, gc->ngpio); |
---|
605 | 762 | |
---|
606 | | - for (i = 0; i < NBANK(chip); i++) { |
---|
607 | | - trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; |
---|
608 | | - if (trigger[i]) |
---|
609 | | - trigger_seen = true; |
---|
610 | | - } |
---|
| 763 | + bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio); |
---|
| 764 | + bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio); |
---|
| 765 | + bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio); |
---|
611 | 766 | |
---|
612 | | - if (!trigger_seen) |
---|
| 767 | + bitmap_copy(chip->irq_stat, new_stat, gc->ngpio); |
---|
| 768 | + |
---|
| 769 | + if (bitmap_empty(trigger, gc->ngpio)) |
---|
613 | 770 | return false; |
---|
614 | 771 | |
---|
615 | | - memcpy(chip->irq_stat, cur_stat, NBANK(chip)); |
---|
| 772 | + bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio); |
---|
| 773 | + bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio); |
---|
| 774 | + bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio); |
---|
| 775 | + bitmap_and(pending, new_stat, trigger, gc->ngpio); |
---|
616 | 776 | |
---|
617 | | - for (i = 0; i < NBANK(chip); i++) { |
---|
618 | | - pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | |
---|
619 | | - (cur_stat[i] & chip->irq_trig_raise[i]); |
---|
620 | | - pending[i] &= trigger[i]; |
---|
621 | | - if (pending[i]) |
---|
622 | | - pending_seen = true; |
---|
623 | | - } |
---|
624 | | - |
---|
625 | | - return pending_seen; |
---|
| 777 | + return !bitmap_empty(pending, gc->ngpio); |
---|
626 | 778 | } |
---|
627 | 779 | |
---|
628 | 780 | static irqreturn_t pca953x_irq_handler(int irq, void *devid) |
---|
629 | 781 | { |
---|
630 | 782 | struct pca953x_chip *chip = devid; |
---|
631 | | - u8 pending[MAX_BANK]; |
---|
632 | | - u8 level; |
---|
633 | | - unsigned nhandled = 0; |
---|
634 | | - int i; |
---|
| 783 | + struct gpio_chip *gc = &chip->gpio_chip; |
---|
| 784 | + DECLARE_BITMAP(pending, MAX_LINE); |
---|
| 785 | + int level; |
---|
| 786 | + bool ret; |
---|
635 | 787 | |
---|
636 | | - if (!pca953x_irq_pending(chip, pending)) |
---|
637 | | - return IRQ_NONE; |
---|
| 788 | + bitmap_zero(pending, MAX_LINE); |
---|
638 | 789 | |
---|
639 | | - for (i = 0; i < NBANK(chip); i++) { |
---|
640 | | - while (pending[i]) { |
---|
641 | | - level = __ffs(pending[i]); |
---|
642 | | - handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain, |
---|
643 | | - level + (BANK_SZ * i))); |
---|
644 | | - pending[i] &= ~(1 << level); |
---|
645 | | - nhandled++; |
---|
| 790 | + mutex_lock(&chip->i2c_lock); |
---|
| 791 | + ret = pca953x_irq_pending(chip, pending); |
---|
| 792 | + mutex_unlock(&chip->i2c_lock); |
---|
| 793 | + |
---|
| 794 | + if (ret) { |
---|
| 795 | + ret = 0; |
---|
| 796 | + |
---|
| 797 | + for_each_set_bit(level, pending, gc->ngpio) { |
---|
| 798 | + int nested_irq = irq_find_mapping(gc->irq.domain, level); |
---|
| 799 | + |
---|
| 800 | + if (unlikely(nested_irq <= 0)) { |
---|
| 801 | + dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); |
---|
| 802 | + continue; |
---|
| 803 | + } |
---|
| 804 | + |
---|
| 805 | + handle_nested_irq(nested_irq); |
---|
| 806 | + ret = 1; |
---|
646 | 807 | } |
---|
647 | 808 | } |
---|
648 | 809 | |
---|
649 | | - return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; |
---|
| 810 | + return IRQ_RETVAL(ret); |
---|
650 | 811 | } |
---|
651 | 812 | |
---|
652 | | -static int pca953x_irq_setup(struct pca953x_chip *chip, |
---|
653 | | - int irq_base) |
---|
| 813 | +static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) |
---|
654 | 814 | { |
---|
655 | 815 | struct i2c_client *client = chip->client; |
---|
656 | | - int ret, i; |
---|
| 816 | + struct irq_chip *irq_chip = &chip->irq_chip; |
---|
| 817 | + DECLARE_BITMAP(reg_direction, MAX_LINE); |
---|
| 818 | + DECLARE_BITMAP(irq_stat, MAX_LINE); |
---|
| 819 | + struct gpio_irq_chip *girq; |
---|
| 820 | + int ret; |
---|
657 | 821 | |
---|
658 | | - if (client->irq && irq_base != -1 |
---|
659 | | - && (chip->driver_data & PCA_INT)) { |
---|
660 | | - ret = pca953x_read_regs(chip, |
---|
661 | | - chip->regs->input, chip->irq_stat); |
---|
662 | | - if (ret) |
---|
663 | | - return ret; |
---|
| 822 | + if (dmi_first_match(pca953x_dmi_acpi_irq_info)) { |
---|
| 823 | + ret = pca953x_acpi_get_irq(&client->dev); |
---|
| 824 | + if (ret > 0) |
---|
| 825 | + client->irq = ret; |
---|
| 826 | + } |
---|
664 | 827 | |
---|
665 | | - /* |
---|
666 | | - * There is no way to know which GPIO line generated the |
---|
667 | | - * interrupt. We have to rely on the previous read for |
---|
668 | | - * this purpose. |
---|
669 | | - */ |
---|
670 | | - for (i = 0; i < NBANK(chip); i++) |
---|
671 | | - chip->irq_stat[i] &= chip->reg_direction[i]; |
---|
672 | | - mutex_init(&chip->irq_lock); |
---|
| 828 | + if (!client->irq) |
---|
| 829 | + return 0; |
---|
673 | 830 | |
---|
674 | | - ret = devm_request_threaded_irq(&client->dev, |
---|
675 | | - client->irq, |
---|
676 | | - NULL, |
---|
677 | | - pca953x_irq_handler, |
---|
678 | | - IRQF_TRIGGER_LOW | IRQF_ONESHOT | |
---|
679 | | - IRQF_SHARED, |
---|
680 | | - dev_name(&client->dev), chip); |
---|
681 | | - if (ret) { |
---|
682 | | - dev_err(&client->dev, "failed to request irq %d\n", |
---|
683 | | - client->irq); |
---|
684 | | - return ret; |
---|
685 | | - } |
---|
| 831 | + if (irq_base == -1) |
---|
| 832 | + return 0; |
---|
686 | 833 | |
---|
687 | | - ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, |
---|
688 | | - &pca953x_irq_chip, |
---|
689 | | - irq_base, |
---|
690 | | - handle_simple_irq, |
---|
691 | | - IRQ_TYPE_NONE); |
---|
692 | | - if (ret) { |
---|
693 | | - dev_err(&client->dev, |
---|
694 | | - "could not connect irqchip to gpiochip\n"); |
---|
695 | | - return ret; |
---|
696 | | - } |
---|
| 834 | + if (!(chip->driver_data & PCA_INT)) |
---|
| 835 | + return 0; |
---|
697 | 836 | |
---|
698 | | - gpiochip_set_nested_irqchip(&chip->gpio_chip, |
---|
699 | | - &pca953x_irq_chip, |
---|
700 | | - client->irq); |
---|
| 837 | + ret = pca953x_read_regs(chip, chip->regs->input, irq_stat); |
---|
| 838 | + if (ret) |
---|
| 839 | + return ret; |
---|
| 840 | + |
---|
| 841 | + /* |
---|
| 842 | + * There is no way to know which GPIO line generated the |
---|
| 843 | + * interrupt. We have to rely on the previous read for |
---|
| 844 | + * this purpose. |
---|
| 845 | + */ |
---|
| 846 | + pca953x_read_regs(chip, chip->regs->direction, reg_direction); |
---|
| 847 | + bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio); |
---|
| 848 | + mutex_init(&chip->irq_lock); |
---|
| 849 | + |
---|
| 850 | + irq_chip->name = dev_name(&client->dev); |
---|
| 851 | + irq_chip->irq_mask = pca953x_irq_mask; |
---|
| 852 | + irq_chip->irq_unmask = pca953x_irq_unmask; |
---|
| 853 | + irq_chip->irq_set_wake = pca953x_irq_set_wake; |
---|
| 854 | + irq_chip->irq_bus_lock = pca953x_irq_bus_lock; |
---|
| 855 | + irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock; |
---|
| 856 | + irq_chip->irq_set_type = pca953x_irq_set_type; |
---|
| 857 | + irq_chip->irq_shutdown = pca953x_irq_shutdown; |
---|
| 858 | + |
---|
| 859 | + girq = &chip->gpio_chip.irq; |
---|
| 860 | + girq->chip = irq_chip; |
---|
| 861 | + /* This will let us handle the parent IRQ in the driver */ |
---|
| 862 | + girq->parent_handler = NULL; |
---|
| 863 | + girq->num_parents = 0; |
---|
| 864 | + girq->parents = NULL; |
---|
| 865 | + girq->default_type = IRQ_TYPE_NONE; |
---|
| 866 | + girq->handler = handle_simple_irq; |
---|
| 867 | + girq->threaded = true; |
---|
| 868 | + girq->first = irq_base; /* FIXME: get rid of this */ |
---|
| 869 | + |
---|
| 870 | + ret = devm_request_threaded_irq(&client->dev, client->irq, |
---|
| 871 | + NULL, pca953x_irq_handler, |
---|
| 872 | + IRQF_ONESHOT | IRQF_SHARED, |
---|
| 873 | + dev_name(&client->dev), chip); |
---|
| 874 | + if (ret) { |
---|
| 875 | + dev_err(&client->dev, "failed to request irq %d\n", |
---|
| 876 | + client->irq); |
---|
| 877 | + return ret; |
---|
701 | 878 | } |
---|
702 | 879 | |
---|
703 | 880 | return 0; |
---|
.. | .. |
---|
716 | 893 | } |
---|
717 | 894 | #endif |
---|
718 | 895 | |
---|
719 | | -static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) |
---|
| 896 | +static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) |
---|
720 | 897 | { |
---|
| 898 | + DECLARE_BITMAP(val, MAX_LINE); |
---|
| 899 | + u8 regaddr; |
---|
721 | 900 | int ret; |
---|
722 | | - u8 val[MAX_BANK]; |
---|
723 | 901 | |
---|
724 | | - chip->regs = &pca953x_regs; |
---|
725 | | - |
---|
726 | | - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); |
---|
| 902 | + regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0); |
---|
| 903 | + ret = regcache_sync_region(chip->regmap, regaddr, |
---|
| 904 | + regaddr + NBANK(chip) - 1); |
---|
727 | 905 | if (ret) |
---|
728 | 906 | goto out; |
---|
729 | 907 | |
---|
730 | | - ret = pca953x_read_regs(chip, chip->regs->direction, |
---|
731 | | - chip->reg_direction); |
---|
| 908 | + regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0); |
---|
| 909 | + ret = regcache_sync_region(chip->regmap, regaddr, |
---|
| 910 | + regaddr + NBANK(chip) - 1); |
---|
732 | 911 | if (ret) |
---|
733 | 912 | goto out; |
---|
734 | 913 | |
---|
735 | 914 | /* set platform specific polarity inversion */ |
---|
736 | 915 | if (invert) |
---|
737 | | - memset(val, 0xFF, NBANK(chip)); |
---|
| 916 | + bitmap_fill(val, MAX_LINE); |
---|
738 | 917 | else |
---|
739 | | - memset(val, 0, NBANK(chip)); |
---|
| 918 | + bitmap_zero(val, MAX_LINE); |
---|
740 | 919 | |
---|
741 | | - ret = pca953x_write_regs(chip, PCA953X_INVERT, val); |
---|
| 920 | + ret = pca953x_write_regs(chip, chip->regs->invert, val); |
---|
742 | 921 | out: |
---|
743 | 922 | return ret; |
---|
744 | 923 | } |
---|
745 | 924 | |
---|
746 | 925 | static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) |
---|
747 | 926 | { |
---|
| 927 | + DECLARE_BITMAP(val, MAX_LINE); |
---|
| 928 | + unsigned int i; |
---|
748 | 929 | int ret; |
---|
749 | | - u8 val[MAX_BANK]; |
---|
750 | 930 | |
---|
751 | | - chip->regs = &pca957x_regs; |
---|
752 | | - |
---|
753 | | - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); |
---|
754 | | - if (ret) |
---|
755 | | - goto out; |
---|
756 | | - ret = pca953x_read_regs(chip, chip->regs->direction, |
---|
757 | | - chip->reg_direction); |
---|
758 | | - if (ret) |
---|
759 | | - goto out; |
---|
760 | | - |
---|
761 | | - /* set platform specific polarity inversion */ |
---|
762 | | - if (invert) |
---|
763 | | - memset(val, 0xFF, NBANK(chip)); |
---|
764 | | - else |
---|
765 | | - memset(val, 0, NBANK(chip)); |
---|
766 | | - ret = pca953x_write_regs(chip, PCA957X_INVRT, val); |
---|
| 931 | + ret = device_pca95xx_init(chip, invert); |
---|
767 | 932 | if (ret) |
---|
768 | 933 | goto out; |
---|
769 | 934 | |
---|
770 | 935 | /* To enable register 6, 7 to control pull up and pull down */ |
---|
771 | | - memset(val, 0x02, NBANK(chip)); |
---|
| 936 | + for (i = 0; i < NBANK(chip); i++) |
---|
| 937 | + bitmap_set_value8(val, 0x02, i * BANK_SZ); |
---|
| 938 | + |
---|
772 | 939 | ret = pca953x_write_regs(chip, PCA957X_BKEN, val); |
---|
773 | 940 | if (ret) |
---|
774 | 941 | goto out; |
---|
.. | .. |
---|
778 | 945 | return ret; |
---|
779 | 946 | } |
---|
780 | 947 | |
---|
781 | | -static const struct of_device_id pca953x_dt_ids[]; |
---|
782 | | - |
---|
783 | 948 | static int pca953x_probe(struct i2c_client *client, |
---|
784 | | - const struct i2c_device_id *i2c_id) |
---|
| 949 | + const struct i2c_device_id *i2c_id) |
---|
785 | 950 | { |
---|
786 | 951 | struct pca953x_platform_data *pdata; |
---|
787 | 952 | struct pca953x_chip *chip; |
---|
.. | .. |
---|
789 | 954 | int ret; |
---|
790 | 955 | u32 invert = 0; |
---|
791 | 956 | struct regulator *reg; |
---|
| 957 | + const struct regmap_config *regmap_config; |
---|
792 | 958 | |
---|
793 | | - chip = devm_kzalloc(&client->dev, |
---|
794 | | - sizeof(struct pca953x_chip), GFP_KERNEL); |
---|
| 959 | + chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
---|
795 | 960 | if (chip == NULL) |
---|
796 | 961 | return -ENOMEM; |
---|
797 | 962 | |
---|
.. | .. |
---|
823 | 988 | chip->client = client; |
---|
824 | 989 | |
---|
825 | 990 | reg = devm_regulator_get(&client->dev, "vcc"); |
---|
826 | | - if (IS_ERR(reg)) { |
---|
827 | | - ret = PTR_ERR(reg); |
---|
828 | | - if (ret != -EPROBE_DEFER) |
---|
829 | | - dev_err(&client->dev, "reg get err: %d\n", ret); |
---|
830 | | - return ret; |
---|
831 | | - } |
---|
| 991 | + if (IS_ERR(reg)) |
---|
| 992 | + return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n"); |
---|
| 993 | + |
---|
832 | 994 | ret = regulator_enable(reg); |
---|
833 | 995 | if (ret) { |
---|
834 | 996 | dev_err(&client->dev, "reg en err: %d\n", ret); |
---|
.. | .. |
---|
839 | 1001 | if (i2c_id) { |
---|
840 | 1002 | chip->driver_data = i2c_id->driver_data; |
---|
841 | 1003 | } else { |
---|
842 | | - const struct acpi_device_id *acpi_id; |
---|
843 | | - struct device *dev = &client->dev; |
---|
| 1004 | + const void *match; |
---|
844 | 1005 | |
---|
845 | | - chip->driver_data = (uintptr_t)of_device_get_match_data(dev); |
---|
846 | | - if (!chip->driver_data) { |
---|
847 | | - acpi_id = acpi_match_device(pca953x_acpi_ids, dev); |
---|
848 | | - if (!acpi_id) { |
---|
849 | | - ret = -ENODEV; |
---|
850 | | - goto err_exit; |
---|
851 | | - } |
---|
852 | | - |
---|
853 | | - chip->driver_data = acpi_id->driver_data; |
---|
| 1006 | + match = device_get_match_data(&client->dev); |
---|
| 1007 | + if (!match) { |
---|
| 1008 | + ret = -ENODEV; |
---|
| 1009 | + goto err_exit; |
---|
854 | 1010 | } |
---|
| 1011 | + |
---|
| 1012 | + chip->driver_data = (uintptr_t)match; |
---|
855 | 1013 | } |
---|
| 1014 | + |
---|
| 1015 | + i2c_set_clientdata(client, chip); |
---|
| 1016 | + |
---|
| 1017 | + pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); |
---|
| 1018 | + |
---|
| 1019 | + if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) { |
---|
| 1020 | + dev_info(&client->dev, "using AI\n"); |
---|
| 1021 | + regmap_config = &pca953x_ai_i2c_regmap; |
---|
| 1022 | + } else { |
---|
| 1023 | + dev_info(&client->dev, "using no AI\n"); |
---|
| 1024 | + regmap_config = &pca953x_i2c_regmap; |
---|
| 1025 | + } |
---|
| 1026 | + |
---|
| 1027 | + chip->regmap = devm_regmap_init_i2c(client, regmap_config); |
---|
| 1028 | + if (IS_ERR(chip->regmap)) { |
---|
| 1029 | + ret = PTR_ERR(chip->regmap); |
---|
| 1030 | + goto err_exit; |
---|
| 1031 | + } |
---|
| 1032 | + |
---|
| 1033 | + regcache_mark_dirty(chip->regmap); |
---|
856 | 1034 | |
---|
857 | 1035 | mutex_init(&chip->i2c_lock); |
---|
858 | 1036 | /* |
---|
.. | .. |
---|
877 | 1055 | /* initialize cached registers from their original values. |
---|
878 | 1056 | * we can't share this chip with another i2c master. |
---|
879 | 1057 | */ |
---|
880 | | - pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); |
---|
881 | 1058 | |
---|
882 | | - if (chip->gpio_chip.ngpio <= 8) { |
---|
883 | | - chip->write_regs = pca953x_write_regs_8; |
---|
884 | | - chip->read_regs = pca953x_read_regs_8; |
---|
885 | | - } else if (chip->gpio_chip.ngpio >= 24) { |
---|
886 | | - chip->write_regs = pca953x_write_regs_24; |
---|
887 | | - chip->read_regs = pca953x_read_regs_24; |
---|
| 1059 | + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { |
---|
| 1060 | + chip->regs = &pca953x_regs; |
---|
| 1061 | + ret = device_pca95xx_init(chip, invert); |
---|
888 | 1062 | } else { |
---|
889 | | - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) |
---|
890 | | - chip->write_regs = pca953x_write_regs_16; |
---|
891 | | - else |
---|
892 | | - chip->write_regs = pca957x_write_regs_16; |
---|
893 | | - chip->read_regs = pca953x_read_regs_16; |
---|
894 | | - } |
---|
895 | | - |
---|
896 | | - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) |
---|
897 | | - ret = device_pca953x_init(chip, invert); |
---|
898 | | - else |
---|
| 1063 | + chip->regs = &pca957x_regs; |
---|
899 | 1064 | ret = device_pca957x_init(chip, invert); |
---|
900 | | - if (ret) |
---|
901 | | - goto err_exit; |
---|
902 | | - |
---|
903 | | - ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); |
---|
| 1065 | + } |
---|
904 | 1066 | if (ret) |
---|
905 | 1067 | goto err_exit; |
---|
906 | 1068 | |
---|
.. | .. |
---|
908 | 1070 | if (ret) |
---|
909 | 1071 | goto err_exit; |
---|
910 | 1072 | |
---|
| 1073 | + ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); |
---|
| 1074 | + if (ret) |
---|
| 1075 | + goto err_exit; |
---|
| 1076 | + |
---|
911 | 1077 | if (pdata && pdata->setup) { |
---|
912 | 1078 | ret = pdata->setup(client, chip->gpio_chip.base, |
---|
913 | | - chip->gpio_chip.ngpio, pdata->context); |
---|
| 1079 | + chip->gpio_chip.ngpio, pdata->context); |
---|
914 | 1080 | if (ret < 0) |
---|
915 | 1081 | dev_warn(&client->dev, "setup failed, %d\n", ret); |
---|
916 | 1082 | } |
---|
917 | 1083 | |
---|
918 | | - i2c_set_clientdata(client, chip); |
---|
919 | 1084 | return 0; |
---|
920 | 1085 | |
---|
921 | 1086 | err_exit: |
---|
.. | .. |
---|
931 | 1096 | |
---|
932 | 1097 | if (pdata && pdata->teardown) { |
---|
933 | 1098 | ret = pdata->teardown(client, chip->gpio_chip.base, |
---|
934 | | - chip->gpio_chip.ngpio, pdata->context); |
---|
| 1099 | + chip->gpio_chip.ngpio, pdata->context); |
---|
935 | 1100 | if (ret < 0) |
---|
936 | | - dev_err(&client->dev, "%s failed, %d\n", |
---|
937 | | - "teardown", ret); |
---|
| 1101 | + dev_err(&client->dev, "teardown failed, %d\n", ret); |
---|
938 | 1102 | } else { |
---|
939 | 1103 | ret = 0; |
---|
940 | 1104 | } |
---|
.. | .. |
---|
944 | 1108 | return ret; |
---|
945 | 1109 | } |
---|
946 | 1110 | |
---|
| 1111 | +#ifdef CONFIG_PM_SLEEP |
---|
| 1112 | +static int pca953x_regcache_sync(struct device *dev) |
---|
| 1113 | +{ |
---|
| 1114 | + struct pca953x_chip *chip = dev_get_drvdata(dev); |
---|
| 1115 | + int ret; |
---|
| 1116 | + u8 regaddr; |
---|
| 1117 | + |
---|
| 1118 | + /* |
---|
| 1119 | + * The ordering between direction and output is important, |
---|
| 1120 | + * sync these registers first and only then sync the rest. |
---|
| 1121 | + */ |
---|
| 1122 | + regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0); |
---|
| 1123 | + ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1); |
---|
| 1124 | + if (ret) { |
---|
| 1125 | + dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); |
---|
| 1126 | + return ret; |
---|
| 1127 | + } |
---|
| 1128 | + |
---|
| 1129 | + regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0); |
---|
| 1130 | + ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip) - 1); |
---|
| 1131 | + if (ret) { |
---|
| 1132 | + dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); |
---|
| 1133 | + return ret; |
---|
| 1134 | + } |
---|
| 1135 | + |
---|
| 1136 | +#ifdef CONFIG_GPIO_PCA953X_IRQ |
---|
| 1137 | + if (chip->driver_data & PCA_PCAL) { |
---|
| 1138 | + regaddr = pca953x_recalc_addr(chip, PCAL953X_IN_LATCH, 0); |
---|
| 1139 | + ret = regcache_sync_region(chip->regmap, regaddr, |
---|
| 1140 | + regaddr + NBANK(chip) - 1); |
---|
| 1141 | + if (ret) { |
---|
| 1142 | + dev_err(dev, "Failed to sync INT latch registers: %d\n", |
---|
| 1143 | + ret); |
---|
| 1144 | + return ret; |
---|
| 1145 | + } |
---|
| 1146 | + |
---|
| 1147 | + regaddr = pca953x_recalc_addr(chip, PCAL953X_INT_MASK, 0); |
---|
| 1148 | + ret = regcache_sync_region(chip->regmap, regaddr, |
---|
| 1149 | + regaddr + NBANK(chip) - 1); |
---|
| 1150 | + if (ret) { |
---|
| 1151 | + dev_err(dev, "Failed to sync INT mask registers: %d\n", |
---|
| 1152 | + ret); |
---|
| 1153 | + return ret; |
---|
| 1154 | + } |
---|
| 1155 | + } |
---|
| 1156 | +#endif |
---|
| 1157 | + |
---|
| 1158 | + return 0; |
---|
| 1159 | +} |
---|
| 1160 | + |
---|
| 1161 | +static int pca953x_suspend(struct device *dev) |
---|
| 1162 | +{ |
---|
| 1163 | + struct pca953x_chip *chip = dev_get_drvdata(dev); |
---|
| 1164 | + |
---|
| 1165 | + mutex_lock(&chip->i2c_lock); |
---|
| 1166 | + regcache_cache_only(chip->regmap, true); |
---|
| 1167 | + mutex_unlock(&chip->i2c_lock); |
---|
| 1168 | + |
---|
| 1169 | + if (atomic_read(&chip->wakeup_path)) |
---|
| 1170 | + device_set_wakeup_path(dev); |
---|
| 1171 | + else |
---|
| 1172 | + regulator_disable(chip->regulator); |
---|
| 1173 | + |
---|
| 1174 | + return 0; |
---|
| 1175 | +} |
---|
| 1176 | + |
---|
| 1177 | +static int pca953x_resume(struct device *dev) |
---|
| 1178 | +{ |
---|
| 1179 | + struct pca953x_chip *chip = dev_get_drvdata(dev); |
---|
| 1180 | + int ret; |
---|
| 1181 | + |
---|
| 1182 | + if (!atomic_read(&chip->wakeup_path)) { |
---|
| 1183 | + ret = regulator_enable(chip->regulator); |
---|
| 1184 | + if (ret) { |
---|
| 1185 | + dev_err(dev, "Failed to enable regulator: %d\n", ret); |
---|
| 1186 | + return 0; |
---|
| 1187 | + } |
---|
| 1188 | + } |
---|
| 1189 | + |
---|
| 1190 | + mutex_lock(&chip->i2c_lock); |
---|
| 1191 | + regcache_cache_only(chip->regmap, false); |
---|
| 1192 | + regcache_mark_dirty(chip->regmap); |
---|
| 1193 | + ret = pca953x_regcache_sync(dev); |
---|
| 1194 | + if (ret) { |
---|
| 1195 | + mutex_unlock(&chip->i2c_lock); |
---|
| 1196 | + return ret; |
---|
| 1197 | + } |
---|
| 1198 | + |
---|
| 1199 | + ret = regcache_sync(chip->regmap); |
---|
| 1200 | + mutex_unlock(&chip->i2c_lock); |
---|
| 1201 | + if (ret) { |
---|
| 1202 | + dev_err(dev, "Failed to restore register map: %d\n", ret); |
---|
| 1203 | + return ret; |
---|
| 1204 | + } |
---|
| 1205 | + |
---|
| 1206 | + return 0; |
---|
| 1207 | +} |
---|
| 1208 | +#endif |
---|
| 1209 | + |
---|
947 | 1210 | /* convenience to stop overlong match-table lines */ |
---|
948 | 1211 | #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) |
---|
949 | 1212 | #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) |
---|
950 | 1213 | |
---|
951 | 1214 | static const struct of_device_id pca953x_dt_ids[] = { |
---|
| 1215 | + { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), }, |
---|
952 | 1216 | { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, |
---|
953 | 1217 | { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, |
---|
954 | 1218 | { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, |
---|
.. | .. |
---|
964 | 1228 | { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, |
---|
965 | 1229 | { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, |
---|
966 | 1230 | |
---|
| 1231 | + { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), }, |
---|
967 | 1232 | { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), }, |
---|
| 1233 | + { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), }, |
---|
| 1234 | + { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), }, |
---|
968 | 1235 | { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), }, |
---|
969 | 1236 | |
---|
970 | 1237 | { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, |
---|
.. | .. |
---|
978 | 1245 | { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, |
---|
979 | 1246 | { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, |
---|
980 | 1247 | { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, |
---|
| 1248 | + { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), }, |
---|
981 | 1249 | |
---|
| 1250 | + { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), }, |
---|
982 | 1251 | { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, |
---|
983 | 1252 | { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), }, |
---|
984 | 1253 | |
---|
.. | .. |
---|
988 | 1257 | |
---|
989 | 1258 | MODULE_DEVICE_TABLE(of, pca953x_dt_ids); |
---|
990 | 1259 | |
---|
| 1260 | +static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); |
---|
| 1261 | + |
---|
991 | 1262 | static struct i2c_driver pca953x_driver = { |
---|
992 | 1263 | .driver = { |
---|
993 | 1264 | .name = "pca953x", |
---|
| 1265 | + .pm = &pca953x_pm_ops, |
---|
994 | 1266 | .of_match_table = pca953x_dt_ids, |
---|
995 | | - .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), |
---|
| 1267 | + .acpi_match_table = pca953x_acpi_ids, |
---|
996 | 1268 | }, |
---|
997 | 1269 | .probe = pca953x_probe, |
---|
998 | 1270 | .remove = pca953x_remove, |
---|