add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/dma/mv_xor_v2.c
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@@ -1,15 +1,7 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Copyright (C) 2015-2016 Marvell International Ltd.
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- * This program is free software: you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License as
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- * published by the Free Software Foundation, either version 2 of the
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- * License, or any later version.
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- *
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- * This program is distributed in the hope that it will be useful, but
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- * WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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- * General Public License for more details.
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  */
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 #include <linux/clk.h>
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@@ -41,7 +33,6 @@
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 #define MV_XOR_V2_DMA_IMSG_CDAT_OFF			0x014
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 #define MV_XOR_V2_DMA_IMSG_THRD_OFF			0x018
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 #define   MV_XOR_V2_DMA_IMSG_THRD_MASK			0x7FFF
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-#define   MV_XOR_V2_DMA_IMSG_THRD_SHIFT			0x0
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 #define   MV_XOR_V2_DMA_IMSG_TIMER_EN			BIT(18)
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 #define MV_XOR_V2_DMA_DESQ_AWATTR_OFF			0x01C
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   /* Same flags as MV_XOR_V2_DMA_DESQ_ARATTR_OFF */
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@@ -58,7 +49,6 @@
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 #define MV_XOR_V2_DMA_DESQ_ADD_OFF			0x808
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 #define MV_XOR_V2_DMA_IMSG_TMOT				0x810
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 #define   MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK		0x1FFF
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-#define   MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT		0
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 /* XOR Global registers */
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 #define MV_XOR_V2_GLOB_BW_CTRL				0x4
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@@ -145,9 +135,11 @@
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 /**
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  * struct mv_xor_v2_device - implements a xor device
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  * @lock: lock for the engine
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+ * @clk: reference to the 'core' clock
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+ * @reg_clk: reference to the 'reg' clock
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  * @dma_base: memory mapped DMA register base
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  * @glob_base: memory mapped global register base
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- * @irq_tasklet:
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+ * @irq_tasklet: tasklet used for IRQ handling call-backs
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  * @free_sw_desc: linked list of free SW descriptors
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  * @dmadev: dma device
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  * @dmachan: dma channel
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@@ -156,6 +148,8 @@
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  * @sw_desq: SW descriptors queue
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  * @desc_size: HW descriptor size
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  * @npendings: number of pending descriptors (for which tx_submit has
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+ * @hw_queue_idx: HW queue index
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+ * @msi_desc: local interrupt descriptor information
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  * been called, but not yet issue_pending)
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  */
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 struct mv_xor_v2_device {
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@@ -269,16 +263,15 @@
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 	/* Configure threshold of number of descriptors, and enable timer */
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 	reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);
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-	reg &= (~MV_XOR_V2_DMA_IMSG_THRD_MASK << MV_XOR_V2_DMA_IMSG_THRD_SHIFT);
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-	reg |= (MV_XOR_V2_DONE_IMSG_THRD << MV_XOR_V2_DMA_IMSG_THRD_SHIFT);
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+	reg &= ~MV_XOR_V2_DMA_IMSG_THRD_MASK;
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+	reg |= MV_XOR_V2_DONE_IMSG_THRD;
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 	reg |= MV_XOR_V2_DMA_IMSG_TIMER_EN;
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 	writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);
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 	/* Configure Timer Threshold */
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 	reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
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-	reg &= (~MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK <<
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-		MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT);
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-	reg |= (MV_XOR_V2_TIMER_THRD << MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT);
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+	reg &= ~MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK;
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+	reg |= MV_XOR_V2_TIMER_THRD;
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 	writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
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 }
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@@ -560,9 +553,10 @@
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 /*
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  * handle the descriptors after HW process
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  */
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-static void mv_xor_v2_tasklet(unsigned long data)
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+static void mv_xor_v2_tasklet(struct tasklet_struct *t)
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 {
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-	struct mv_xor_v2_device *xor_dev = (struct mv_xor_v2_device *) data;
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+	struct mv_xor_v2_device *xor_dev = from_tasklet(xor_dev, t,
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+							irq_tasklet);
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 	int pending_ptr, num_of_pending, i;
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 	struct mv_xor_v2_sw_desc *next_pending_sw_desc = NULL;
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@@ -761,8 +755,8 @@
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 	}
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 	xor_dev->clk = devm_clk_get(&pdev->dev, NULL);
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-	if (IS_ERR(xor_dev->clk) && PTR_ERR(xor_dev->clk) == -EPROBE_DEFER) {
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-		ret = EPROBE_DEFER;
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+	if (PTR_ERR(xor_dev->clk) == -EPROBE_DEFER) {
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+		ret = -EPROBE_DEFER;
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 		goto disable_reg_clk;
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 	}
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 	if (!IS_ERR(xor_dev->clk)) {
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@@ -789,8 +783,7 @@
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 	if (ret)
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 		goto free_msi_irqs;
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-	tasklet_init(&xor_dev->irq_tasklet, mv_xor_v2_tasklet,
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-		     (unsigned long) xor_dev);
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+	tasklet_setup(&xor_dev->irq_tasklet, mv_xor_v2_tasklet);
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 	xor_dev->desc_size = mv_xor_v2_set_desc_size(xor_dev);
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@@ -906,6 +899,7 @@
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 	tasklet_kill(&xor_dev->irq_tasklet);
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 	clk_disable_unprepare(xor_dev->clk);
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+	clk_disable_unprepare(xor_dev->reg_clk);
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 	return 0;
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 }