hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/dma/imx-dma.c
....@@ -162,6 +162,7 @@
162162 bool enabled_2d;
163163 int slot_2d;
164164 unsigned int irq;
165
+ struct dma_slave_config config;
165166 };
166167
167168 enum imx_dma_type {
....@@ -172,7 +173,6 @@
172173
173174 struct imxdma_engine {
174175 struct device *dev;
175
- struct device_dma_parameters dma_parms;
176176 struct dma_device dma_device;
177177 void __iomem *base;
178178 struct clk *dma_ahb;
....@@ -277,12 +277,12 @@
277277 /*
278278 * imxdma_sg_next - prepare next chunk for scatter-gather DMA emulation
279279 */
280
-static inline int imxdma_sg_next(struct imxdma_desc *d)
280
+static inline void imxdma_sg_next(struct imxdma_desc *d)
281281 {
282282 struct imxdma_channel *imxdmac = to_imxdma_chan(d->desc.chan);
283283 struct imxdma_engine *imxdma = imxdmac->imxdma;
284284 struct scatterlist *sg = d->sg;
285
- unsigned long now;
285
+ size_t now;
286286
287287 now = min_t(size_t, d->len, sg_dma_len(sg));
288288 if (d->len != IMX_DMA_LENGTH_LOOP)
....@@ -302,8 +302,6 @@
302302 imx_dmav1_readl(imxdma, DMA_DAR(imxdmac->channel)),
303303 imx_dmav1_readl(imxdma, DMA_SAR(imxdmac->channel)),
304304 imx_dmav1_readl(imxdma, DMA_CNTR(imxdmac->channel)));
305
-
306
- return now;
307305 }
308306
309307 static void imxdma_enable_hw(struct imxdma_desc *d)
....@@ -557,6 +555,7 @@
557555 * We fall-through here intentionally, since a 2D transfer is
558556 * similar to MEMCPY just adding the 2D slot configuration.
559557 */
558
+ fallthrough;
560559 case IMXDMA_DESC_MEMCPY:
561560 imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));
562561 imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));
....@@ -613,9 +612,9 @@
613612 return 0;
614613 }
615614
616
-static void imxdma_tasklet(unsigned long data)
615
+static void imxdma_tasklet(struct tasklet_struct *t)
617616 {
618
- struct imxdma_channel *imxdmac = (void *)data;
617
+ struct imxdma_channel *imxdmac = from_tasklet(imxdmac, t, dma_tasklet);
619618 struct imxdma_engine *imxdma = imxdmac->imxdma;
620619 struct imxdma_desc *desc, *next_desc;
621620 unsigned long flags;
....@@ -675,14 +674,15 @@
675674 return 0;
676675 }
677676
678
-static int imxdma_config(struct dma_chan *chan,
679
- struct dma_slave_config *dmaengine_cfg)
677
+static int imxdma_config_write(struct dma_chan *chan,
678
+ struct dma_slave_config *dmaengine_cfg,
679
+ enum dma_transfer_direction direction)
680680 {
681681 struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
682682 struct imxdma_engine *imxdma = imxdmac->imxdma;
683683 unsigned int mode = 0;
684684
685
- if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) {
685
+ if (direction == DMA_DEV_TO_MEM) {
686686 imxdmac->per_address = dmaengine_cfg->src_addr;
687687 imxdmac->watermark_level = dmaengine_cfg->src_maxburst;
688688 imxdmac->word_size = dmaengine_cfg->src_addr_width;
....@@ -719,6 +719,16 @@
719719 /* Set burst length */
720720 imx_dmav1_writel(imxdma, imxdmac->watermark_level *
721721 imxdmac->word_size, DMA_BLR(imxdmac->channel));
722
+
723
+ return 0;
724
+}
725
+
726
+static int imxdma_config(struct dma_chan *chan,
727
+ struct dma_slave_config *dmaengine_cfg)
728
+{
729
+ struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
730
+
731
+ memcpy(&imxdmac->config, dmaengine_cfg, sizeof(*dmaengine_cfg));
722732
723733 return 0;
724734 }
....@@ -821,6 +831,8 @@
821831 dma_length += sg_dma_len(sg);
822832 }
823833
834
+ imxdma_config_write(chan, &imxdmac->config, direction);
835
+
824836 switch (imxdmac->word_size) {
825837 case DMA_SLAVE_BUSWIDTH_4_BYTES:
826838 if (sg_dma_len(sgl) & 3 || sgl->dma_address & 3)
....@@ -904,6 +916,8 @@
904916 }
905917 desc->desc.callback = NULL;
906918 desc->desc.callback_param = NULL;
919
+
920
+ imxdma_config_write(chan, &imxdmac->config, direction);
907921
908922 return &desc->desc;
909923 }
....@@ -1156,8 +1170,7 @@
11561170 INIT_LIST_HEAD(&imxdmac->ld_free);
11571171 INIT_LIST_HEAD(&imxdmac->ld_active);
11581172
1159
- tasklet_init(&imxdmac->dma_tasklet, imxdma_tasklet,
1160
- (unsigned long)imxdmac);
1173
+ tasklet_setup(&imxdmac->dma_tasklet, imxdma_tasklet);
11611174 imxdmac->chan.device = &imxdma->dma_device;
11621175 dma_cookie_init(&imxdmac->chan);
11631176 imxdmac->channel = i;
....@@ -1183,7 +1196,6 @@
11831196 platform_set_drvdata(pdev, imxdma);
11841197
11851198 imxdma->dma_device.copy_align = DMAENGINE_ALIGN_4_BYTES;
1186
- imxdma->dma_device.dev->dma_parms = &imxdma->dma_parms;
11871199 dma_set_max_seg_size(imxdma->dma_device.dev, 0xffffff);
11881200
11891201 ret = dma_async_device_register(&imxdma->dma_device);