.. | .. |
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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | # |
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2 | 3 | # DMA engine configuration |
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3 | 4 | # |
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.. | .. |
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14 | 15 | be empty in some cases. |
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15 | 16 | |
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16 | 17 | config DMADEVICES_DEBUG |
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17 | | - bool "DMA Engine debugging" |
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18 | | - depends on DMADEVICES != n |
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19 | | - help |
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20 | | - This is an option for use by developers; most people should |
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21 | | - say N here. This enables DMA engine core and driver debugging. |
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| 18 | + bool "DMA Engine debugging" |
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| 19 | + depends on DMADEVICES != n |
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| 20 | + help |
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| 21 | + This is an option for use by developers; most people should |
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| 22 | + say N here. This enables DMA engine core and driver debugging. |
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22 | 23 | |
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23 | 24 | config DMADEVICES_VDEBUG |
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24 | | - bool "DMA Engine verbose debugging" |
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25 | | - depends on DMADEVICES_DEBUG != n |
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26 | | - help |
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27 | | - This is an option for use by developers; most people should |
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28 | | - say N here. This enables deeper (more verbose) debugging of |
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29 | | - the DMA engine core and drivers. |
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| 25 | + bool "DMA Engine verbose debugging" |
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| 26 | + depends on DMADEVICES_DEBUG != n |
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| 27 | + help |
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| 28 | + This is an option for use by developers; most people should |
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| 29 | + say N here. This enables deeper (more verbose) debugging of |
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| 30 | + the DMA engine core and drivers. |
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30 | 31 | |
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31 | 32 | |
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32 | 33 | if DMADEVICES |
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.. | .. |
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100 | 101 | |
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101 | 102 | config AXI_DMAC |
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102 | 103 | tristate "Analog Devices AXI-DMAC DMA support" |
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103 | | - depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST |
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| 104 | + depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST |
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104 | 105 | select DMA_ENGINE |
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105 | 106 | select DMA_VIRTUAL_CHANNELS |
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| 107 | + select REGMAP_MMIO |
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106 | 108 | help |
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107 | 109 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
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108 | | - controller is often used in Analog Device's reference designs for FPGA |
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| 110 | + controller is often used in Analog Devices' reference designs for FPGA |
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109 | 111 | platforms. |
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110 | 112 | |
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111 | 113 | config BCM_SBA_RAID |
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.. | .. |
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133 | 135 | config DMA_BCM2835 |
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134 | 136 | tristate "BCM2835 DMA engine support" |
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135 | 137 | depends on ARCH_BCM2835 |
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136 | | - select DMA_ENGINE |
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137 | | - select DMA_VIRTUAL_CHANNELS |
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138 | | - |
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139 | | -config DMA_JZ4740 |
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140 | | - tristate "JZ4740 DMA support" |
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141 | | - depends on MACH_JZ4740 || COMPILE_TEST |
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142 | 138 | select DMA_ENGINE |
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143 | 139 | select DMA_VIRTUAL_CHANNELS |
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144 | 140 | |
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.. | .. |
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203 | 199 | depends on FSL_SOC |
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204 | 200 | select DMA_ENGINE |
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205 | 201 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
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206 | | - ---help--- |
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| 202 | + help |
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207 | 203 | Enable support for the Freescale Elo series DMA controllers. |
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208 | 204 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the |
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209 | 205 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on |
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.. | .. |
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212 | 208 | config FSL_EDMA |
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213 | 209 | tristate "Freescale eDMA engine support" |
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214 | 210 | depends on OF |
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| 211 | + depends on HAS_IOMEM |
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215 | 212 | select DMA_ENGINE |
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216 | 213 | select DMA_VIRTUAL_CHANNELS |
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217 | 214 | help |
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.. | .. |
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219 | 216 | multiplexing capability for DMA request sources(slot). |
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220 | 217 | This module can be found on Freescale Vybrid and LS-1 SoCs. |
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221 | 218 | |
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| 219 | +config FSL_QDMA |
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| 220 | + tristate "NXP Layerscape qDMA engine support" |
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| 221 | + depends on ARM || ARM64 |
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| 222 | + select DMA_ENGINE |
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| 223 | + select DMA_VIRTUAL_CHANNELS |
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| 224 | + select DMA_ENGINE_RAID |
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| 225 | + select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
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| 226 | + help |
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| 227 | + Support the NXP Layerscape qDMA engine with command queue and legacy mode. |
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| 228 | + Channel virtualization is supported through enqueuing of DMA jobs to, |
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| 229 | + or dequeuing DMA jobs from, different work queues. |
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| 230 | + This module can be found on NXP Layerscape SoCs. |
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| 231 | + The qdma driver only work on SoCs with a DPAA hardware block. |
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| 232 | + |
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222 | 233 | config FSL_RAID |
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223 | | - tristate "Freescale RAID engine Support" |
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224 | | - depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH |
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225 | | - select DMA_ENGINE |
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226 | | - select DMA_ENGINE_RAID |
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227 | | - ---help--- |
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228 | | - Enable support for Freescale RAID Engine. RAID Engine is |
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229 | | - available on some QorIQ SoCs (like P5020/P5040). It has |
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230 | | - the capability to offload memcpy, xor and pq computation |
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| 234 | + tristate "Freescale RAID engine Support" |
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| 235 | + depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH |
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| 236 | + select DMA_ENGINE |
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| 237 | + select DMA_ENGINE_RAID |
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| 238 | + help |
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| 239 | + Enable support for Freescale RAID Engine. RAID Engine is |
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| 240 | + available on some QorIQ SoCs (like P5020/P5040). It has |
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| 241 | + the capability to offload memcpy, xor and pq computation |
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231 | 242 | for raid5/6. |
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| 243 | + |
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| 244 | +config HISI_DMA |
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| 245 | + tristate "HiSilicon DMA Engine support" |
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| 246 | + depends on ARM64 || COMPILE_TEST |
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| 247 | + depends on PCI_MSI |
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| 248 | + select DMA_ENGINE |
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| 249 | + select DMA_VIRTUAL_CHANNELS |
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| 250 | + help |
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| 251 | + Support HiSilicon Kunpeng DMA engine. |
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232 | 252 | |
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233 | 253 | config IMG_MDC_DMA |
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234 | 254 | tristate "IMG MDC support" |
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.. | .. |
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258 | 278 | |
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259 | 279 | config INTEL_IDMA64 |
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260 | 280 | tristate "Intel integrated DMA 64-bit support" |
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| 281 | + depends on HAS_IOMEM |
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261 | 282 | select DMA_ENGINE |
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262 | 283 | select DMA_VIRTUAL_CHANNELS |
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263 | 284 | help |
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264 | 285 | Enable DMA support for Intel Low Power Subsystem such as found on |
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265 | 286 | Intel Skylake PCH. |
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| 287 | + |
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| 288 | +config INTEL_IDXD |
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| 289 | + tristate "Intel Data Accelerators support" |
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| 290 | + depends on PCI && X86_64 && !UML |
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| 291 | + depends on PCI_MSI |
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| 292 | + depends on SBITMAP |
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| 293 | + select DMA_ENGINE |
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| 294 | + help |
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| 295 | + Enable support for the Intel(R) data accelerators present |
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| 296 | + in Intel Xeon CPU. |
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| 297 | + |
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| 298 | + Say Y if you have such a platform. |
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| 299 | + |
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| 300 | + If unsure, say N. |
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266 | 301 | |
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267 | 302 | config INTEL_IOATDMA |
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268 | 303 | tristate "Intel I/OAT DMA support" |
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.. | .. |
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279 | 314 | If unsure, say N. |
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280 | 315 | |
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281 | 316 | config INTEL_IOP_ADMA |
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282 | | - tristate "Intel IOP ADMA support" |
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283 | | - depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX |
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| 317 | + tristate "Intel IOP32x ADMA support" |
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| 318 | + depends on ARCH_IOP32X || COMPILE_TEST |
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284 | 319 | select DMA_ENGINE |
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285 | 320 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
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286 | 321 | help |
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287 | 322 | Enable support for the Intel(R) IOP Series RAID engines. |
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288 | | - |
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289 | | -config INTEL_MIC_X100_DMA |
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290 | | - tristate "Intel MIC X100 DMA Driver" |
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291 | | - depends on 64BIT && X86 && INTEL_MIC_BUS |
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292 | | - select DMA_ENGINE |
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293 | | - help |
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294 | | - This enables DMA support for the Intel Many Integrated Core |
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295 | | - (MIC) family of PCIe form factor coprocessor X100 devices that |
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296 | | - run a 64 bit Linux OS. This driver will be used by both MIC |
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297 | | - host and card drivers. |
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298 | | - |
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299 | | - If you are building host kernel with a MIC device or a card |
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300 | | - kernel for a MIC device, then say M (recommended) or Y, else |
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301 | | - say N. If unsure say N. |
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302 | | - |
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303 | | - More information about the Intel MIC family as well as the Linux |
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304 | | - OS and tools for MIC to use with this driver are available from |
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305 | | - <http://software.intel.com/en-us/mic-developer>. |
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306 | 323 | |
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307 | 324 | config K3_DMA |
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308 | 325 | tristate "Hisilicon K3 DMA support" |
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.. | .. |
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322 | 339 | Enable support for DMA on NXP LPC18xx/43xx platforms |
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323 | 340 | with PL080 and multiplexed DMA request lines. |
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324 | 341 | |
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| 342 | +config MCF_EDMA |
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| 343 | + tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" |
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| 344 | + depends on M5441x || COMPILE_TEST |
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| 345 | + select DMA_ENGINE |
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| 346 | + select DMA_VIRTUAL_CHANNELS |
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| 347 | + help |
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| 348 | + Support the Freescale ColdFire eDMA engine, 64-channel |
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| 349 | + implementation that performs complex data transfers with |
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| 350 | + minimal intervention from a host processor. |
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| 351 | + This module can be found on Freescale ColdFire mcf5441x SoCs. |
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| 352 | + |
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| 353 | +config MILBEAUT_HDMAC |
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| 354 | + tristate "Milbeaut AHB DMA support" |
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| 355 | + depends on ARCH_MILBEAUT || COMPILE_TEST |
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| 356 | + depends on OF |
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| 357 | + select DMA_ENGINE |
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| 358 | + select DMA_VIRTUAL_CHANNELS |
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| 359 | + help |
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| 360 | + Say yes here to support the Socionext Milbeaut |
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| 361 | + HDMAC device. |
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| 362 | + |
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| 363 | +config MILBEAUT_XDMAC |
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| 364 | + tristate "Milbeaut AXI DMA support" |
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| 365 | + depends on ARCH_MILBEAUT || COMPILE_TEST |
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| 366 | + depends on OF |
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| 367 | + select DMA_ENGINE |
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| 368 | + select DMA_VIRTUAL_CHANNELS |
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| 369 | + help |
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| 370 | + Say yes here to support the Socionext Milbeaut |
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| 371 | + XDMAC device. |
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| 372 | + |
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325 | 373 | config MMP_PDMA |
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326 | 374 | bool "MMP PDMA support" |
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327 | 375 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
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.. | .. |
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333 | 381 | bool "MMP Two-Channel DMA support" |
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334 | 382 | depends on ARCH_MMP || COMPILE_TEST |
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335 | 383 | select DMA_ENGINE |
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336 | | - select MMP_SRAM if ARCH_MMP |
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337 | 384 | select GENERIC_ALLOCATOR |
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338 | 385 | help |
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339 | 386 | Support the MMP Two-Channel DMA engine. |
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340 | 387 | This engine used for MMP Audio DMA and pxa910 SQU. |
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341 | | - It needs sram driver under mach-mmp. |
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342 | 388 | |
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343 | 389 | config MOXART_DMA |
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344 | 390 | tristate "MOXART DMA support" |
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.. | .. |
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354 | 400 | tristate "Freescale MPC512x built-in DMA engine support" |
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355 | 401 | depends on PPC_MPC512x || PPC_MPC831x |
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356 | 402 | select DMA_ENGINE |
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357 | | - ---help--- |
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| 403 | + help |
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358 | 404 | Enable support for the Freescale MPC512x built-in DMA engine. |
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359 | 405 | |
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360 | 406 | config MV_XOR |
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.. | .. |
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363 | 409 | select DMA_ENGINE |
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364 | 410 | select DMA_ENGINE_RAID |
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365 | 411 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
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366 | | - ---help--- |
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| 412 | + help |
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367 | 413 | Enable support for the Marvell XOR engine. |
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368 | 414 | |
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369 | 415 | config MV_XOR_V2 |
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.. | .. |
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373 | 419 | select DMA_ENGINE_RAID |
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374 | 420 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
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375 | 421 | select GENERIC_MSI_IRQ_DOMAIN |
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376 | | - ---help--- |
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| 422 | + help |
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377 | 423 | Enable support for the Marvell version 2 XOR engine. |
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378 | 424 | |
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379 | 425 | This engine provides acceleration for copy, XOR and RAID6 |
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.. | .. |
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456 | 502 | platform. The internal DMA IP of all PXA variants is supported, with |
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457 | 503 | 16 to 32 channels for peripheral to memory or memory to memory |
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458 | 504 | transfers. |
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| 505 | + |
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| 506 | +config PLX_DMA |
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| 507 | + tristate "PLX ExpressLane PEX Switch DMA Engine Support" |
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| 508 | + depends on PCI |
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| 509 | + select DMA_ENGINE |
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| 510 | + help |
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| 511 | + Some PLX ExpressLane PCI Switches support additional DMA engines. |
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| 512 | + These are exposed via extra functions on the switch's |
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| 513 | + upstream port. Each function exposes one DMA channel. |
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459 | 514 | |
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460 | 515 | config SIRF_DMA |
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461 | 516 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
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.. | .. |
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546 | 601 | integrated in chips such as the Toshiba TX4927/38/39. |
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547 | 602 | |
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548 | 603 | config TEGRA20_APB_DMA |
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549 | | - bool "NVIDIA Tegra20 APB DMA support" |
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550 | | - depends on ARCH_TEGRA |
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| 604 | + tristate "NVIDIA Tegra20 APB DMA support" |
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| 605 | + depends on ARCH_TEGRA || COMPILE_TEST |
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551 | 606 | select DMA_ENGINE |
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552 | 607 | help |
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553 | 608 | Support for the NVIDIA Tegra20 APB DMA controller driver. The |
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.. | .. |
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559 | 614 | |
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560 | 615 | config TEGRA210_ADMA |
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561 | 616 | tristate "NVIDIA Tegra210 ADMA support" |
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562 | | - depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK |
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| 617 | + depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) |
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563 | 618 | select DMA_ENGINE |
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564 | 619 | select DMA_VIRTUAL_CHANNELS |
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565 | 620 | help |
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.. | .. |
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576 | 631 | select DMA_ENGINE |
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577 | 632 | help |
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578 | 633 | Enable support for the Timberdale FPGA DMA engine. |
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| 634 | + |
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| 635 | +config UNIPHIER_MDMAC |
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| 636 | + tristate "UniPhier MIO DMAC" |
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| 637 | + depends on ARCH_UNIPHIER || COMPILE_TEST |
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| 638 | + depends on OF |
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| 639 | + select DMA_ENGINE |
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| 640 | + select DMA_VIRTUAL_CHANNELS |
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| 641 | + help |
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| 642 | + Enable support for the MIO DMAC (Media I/O DMA controller) on the |
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| 643 | + UniPhier platform. This DMA controller is used as the external |
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| 644 | + DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. |
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| 645 | + |
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| 646 | +config UNIPHIER_XDMAC |
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| 647 | + tristate "UniPhier XDMAC support" |
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| 648 | + depends on ARCH_UNIPHIER || COMPILE_TEST |
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| 649 | + depends on OF |
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| 650 | + select DMA_ENGINE |
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| 651 | + select DMA_VIRTUAL_CHANNELS |
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| 652 | + help |
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| 653 | + Enable support for the XDMAC (external DMA controller) on the |
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| 654 | + UniPhier platform. This DMA controller can transfer data from |
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| 655 | + memory to memory, memory to peripheral and peripheral to memory. |
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579 | 656 | |
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580 | 657 | config XGENE_DMA |
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581 | 658 | tristate "APM X-Gene DMA support" |
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.. | .. |
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604 | 681 | destination address. |
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605 | 682 | AXI DMA engine provides high-bandwidth one dimensional direct |
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606 | 683 | memory access between memory and AXI4-Stream target peripherals. |
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| 684 | + AXI MCDMA engine provides high-bandwidth direct memory access |
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| 685 | + between memory and AXI4-Stream target peripherals. It provides |
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| 686 | + the scatter gather interface with multiple channels independent |
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| 687 | + configuration support. |
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607 | 688 | |
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608 | 689 | config XILINX_ZYNQMP_DMA |
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609 | 690 | tristate "Xilinx ZynqMP DMA Engine" |
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.. | .. |
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611 | 692 | select DMA_ENGINE |
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612 | 693 | help |
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613 | 694 | Enable support for Xilinx ZynqMP DMA controller. |
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| 695 | + |
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| 696 | +config XILINX_ZYNQMP_DPDMA |
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| 697 | + tristate "Xilinx DPDMA Engine" |
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| 698 | + depends on HAS_IOMEM && OF |
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| 699 | + select DMA_ENGINE |
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| 700 | + select DMA_VIRTUAL_CHANNELS |
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| 701 | + help |
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| 702 | + Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option |
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| 703 | + if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The |
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| 704 | + driver provides the dmaengine required by the DisplayPort subsystem |
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| 705 | + display driver. |
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614 | 706 | |
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615 | 707 | config ZX_DMA |
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616 | 708 | tristate "ZTE ZX DMA support" |
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.. | .. |
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630 | 722 | |
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631 | 723 | source "drivers/dma/dw/Kconfig" |
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632 | 724 | |
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| 725 | +source "drivers/dma/dw-edma/Kconfig" |
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| 726 | + |
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633 | 727 | source "drivers/dma/hsu/Kconfig" |
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| 728 | + |
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| 729 | +source "drivers/dma/sf-pdma/Kconfig" |
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634 | 730 | |
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635 | 731 | source "drivers/dma/sh/Kconfig" |
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636 | 732 | |
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637 | 733 | source "drivers/dma/ti/Kconfig" |
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638 | 734 | |
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| 735 | +source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
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| 736 | + |
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639 | 737 | # clients |
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640 | 738 | comment "DMA Clients" |
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641 | 739 | depends on DMA_ENGINE |
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