add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/cpufreq/loongson2_cpufreq.c
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@@ -20,10 +20,9 @@
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 #include <linux/delay.h>
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 #include <linux/platform_device.h>
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-#include <asm/clock.h>
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 #include <asm/idle.h>
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-#include <asm/mach-loongson64/loongson.h>
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+#include <asm/mach-loongson2ef/loongson.h>
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 static uint nowait;
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@@ -58,29 +57,20 @@
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 	     loongson2_clockmod_table[index].driver_data) / 8;
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 	/* setting the cpu frequency */
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-	clk_set_rate(policy->clk, freq * 1000);
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+	loongson2_cpu_set_rate(freq);
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 	return 0;
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 }
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 static int loongson2_cpufreq_cpu_init(struct cpufreq_policy *policy)
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 {
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-	struct clk *cpuclk;
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 	int i;
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 	unsigned long rate;
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 	int ret;
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-	cpuclk = clk_get(NULL, "cpu_clk");
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-	if (IS_ERR(cpuclk)) {
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-		pr_err("couldn't get CPU clk\n");
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-		return PTR_ERR(cpuclk);
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-	}
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-
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 	rate = cpu_clock_freq / 1000;
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-	if (!rate) {
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-		clk_put(cpuclk);
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+	if (!rate)
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 		return -EINVAL;
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-	}
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 	/* clock table init */
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 	for (i = 2;
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@@ -88,19 +78,16 @@
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 	     i++)
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 		loongson2_clockmod_table[i].frequency = (rate * i) / 8;
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-	ret = clk_set_rate(cpuclk, rate * 1000);
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-	if (ret) {
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-		clk_put(cpuclk);
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+	ret = loongson2_cpu_set_rate(rate);
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+	if (ret)
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 		return ret;
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-	}
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-	policy->clk = cpuclk;
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-	return cpufreq_generic_init(policy, &loongson2_clockmod_table[0], 0);
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+	cpufreq_generic_init(policy, &loongson2_clockmod_table[0], 0);
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+	return 0;
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 }
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 static int loongson2_cpufreq_exit(struct cpufreq_policy *policy)
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 {
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-	clk_put(policy->clk);
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 	return 0;
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 }
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@@ -143,9 +130,11 @@
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 	u32 cpu_freq;
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 	spin_lock_irqsave(&loongson2_wait_lock, flags);
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-	cpu_freq = LOONGSON_CHIPCFG(0);
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-	LOONGSON_CHIPCFG(0) &= ~0x7;	/* Put CPU into wait mode */
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-	LOONGSON_CHIPCFG(0) = cpu_freq;	/* Restore CPU state */
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+	cpu_freq = readl(LOONGSON_CHIPCFG);
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+	/* Put CPU into wait mode */
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+	writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
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+	/* Restore CPU state */
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+	writel(cpu_freq, LOONGSON_CHIPCFG);
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 	spin_unlock_irqrestore(&loongson2_wait_lock, flags);
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 	local_irq_enable();
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 }