hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/clocksource/timer-cadence-ttc.c
....@@ -486,10 +486,10 @@
486486 * and use it. Note that the event timer uses the interrupt and it's the
487487 * 2nd TTC hence the irq_of_parse_and_map(,1)
488488 */
489
- timer_baseaddr = of_iomap(timer, 0);
490
- if (!timer_baseaddr) {
489
+ timer_baseaddr = devm_of_iomap(&pdev->dev, timer, 0, NULL);
490
+ if (IS_ERR(timer_baseaddr)) {
491491 pr_err("ERROR: invalid timer base address\n");
492
- return -ENXIO;
492
+ return PTR_ERR(timer_baseaddr);
493493 }
494494
495495 irq = irq_of_parse_and_map(timer, 1);
....@@ -513,20 +513,27 @@
513513 clk_ce = of_clk_get(timer, clksel);
514514 if (IS_ERR(clk_ce)) {
515515 pr_err("ERROR: timer input clock not found\n");
516
- return PTR_ERR(clk_ce);
516
+ ret = PTR_ERR(clk_ce);
517
+ goto put_clk_cs;
517518 }
518519
519520 ret = ttc_setup_clocksource(clk_cs, timer_baseaddr, timer_width);
520521 if (ret)
521
- return ret;
522
+ goto put_clk_ce;
522523
523524 ret = ttc_setup_clockevent(clk_ce, timer_baseaddr + 4, irq);
524525 if (ret)
525
- return ret;
526
+ goto put_clk_ce;
526527
527528 pr_info("%pOFn #0 at %p, irq=%d\n", timer, timer_baseaddr, irq);
528529
529530 return 0;
531
+
532
+put_clk_ce:
533
+ clk_put(clk_ce);
534
+put_clk_cs:
535
+ clk_put(clk_cs);
536
+ return ret;
530537 }
531538
532539 static const struct of_device_id ttc_timer_of_match[] = {