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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/drivers/clocksource/renesas-ostm.c
....@@ -1,27 +1,18 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23  * Renesas Timer Support - OSTM
34  *
45  * Copyright (C) 2017 Renesas Electronics America, Inc.
56  * Copyright (C) 2017 Chris Brandt
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License as published by
9
- * the Free Software Foundation; either version 2 of the License
10
- *
11
- * This program is distributed in the hope that it will be useful,
12
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
- * GNU General Public License for more details.
15
- *
167  */
178 
18
-#include <linux/of_address.h>
19
-#include <linux/of_irq.h>
209 #include <linux/clk.h>
2110 #include <linux/clockchips.h>
2211 #include <linux/interrupt.h>
2312 #include <linux/sched_clock.h>
2413 #include <linux/slab.h>
14
+
15
+#include "timer-of.h"
2516 
2617 /*
2718  * The OSTM contains independent channels.
....@@ -32,12 +23,6 @@
3223  * The second (or more) channel probed will be set up as an interrupt
3324  * driven clock event.
3425  */
35
-
36
-struct ostm_device {
37
-	void __iomem *base;
38
-	unsigned long ticks_per_jiffy;
39
-	struct clock_event_device ced;
40
-};
4126 
4227 static void __iomem *system_clock;	/* For sched_clock() */
4328 
....@@ -56,41 +41,32 @@
5641 #define	CTL_ONESHOT		0x02
5742 #define	CTL_FREERUN		0x02
5843 
59
-static struct ostm_device *ced_to_ostm(struct clock_event_device *ced)
44
+static void ostm_timer_stop(struct timer_of *to)
6045 {
61
-	return container_of(ced, struct ostm_device, ced);
62
-}
63
-
64
-static void ostm_timer_stop(struct ostm_device *ostm)
65
-{
66
-	if (readb(ostm->base + OSTM_TE) & TE) {
67
-		writeb(TT, ostm->base + OSTM_TT);
46
+	if (readb(timer_of_base(to) + OSTM_TE) & TE) {
47
+		writeb(TT, timer_of_base(to) + OSTM_TT);
6848 
6949 		/*
7050 		 * Read back the register simply to confirm the write operation
7151 		 * has completed since I/O writes can sometimes get queued by
7252 		 * the bus architecture.
7353 		 */
74
-		while (readb(ostm->base + OSTM_TE) & TE)
54
+		while (readb(timer_of_base(to) + OSTM_TE) & TE)
7555 			;
7656 	}
7757 }
7858 
79
-static int __init ostm_init_clksrc(struct ostm_device *ostm, unsigned long rate)
59
+static int __init ostm_init_clksrc(struct timer_of *to)
8060 {
81
-	/*
82
-	 * irq not used (clock sources don't use interrupts)
83
-	 */
61
+	ostm_timer_stop(to);
8462 
85
-	ostm_timer_stop(ostm);
63
+	writel(0, timer_of_base(to) + OSTM_CMP);
64
+	writeb(CTL_FREERUN, timer_of_base(to) + OSTM_CTL);
65
+	writeb(TS, timer_of_base(to) + OSTM_TS);
8666 
87
-	writel(0, ostm->base + OSTM_CMP);
88
-	writeb(CTL_FREERUN, ostm->base + OSTM_CTL);
89
-	writeb(TS, ostm->base + OSTM_TS);
90
-
91
-	return clocksource_mmio_init(ostm->base + OSTM_CNT,
92
-			"ostm", rate,
93
-			300, 32, clocksource_mmio_readl_up);
67
+	return clocksource_mmio_init(timer_of_base(to) + OSTM_CNT,
68
+				     to->np->full_name, timer_of_rate(to), 300,
69
+				     32, clocksource_mmio_readl_up);
9470 }
9571 
9672 static u64 notrace ostm_read_sched_clock(void)
....@@ -98,87 +74,75 @@
9874 	return readl(system_clock);
9975 }
10076 
101
-static void __init ostm_init_sched_clock(struct ostm_device *ostm,
102
-			unsigned long rate)
77
+static void __init ostm_init_sched_clock(struct timer_of *to)
10378 {
104
-	system_clock = ostm->base + OSTM_CNT;
105
-	sched_clock_register(ostm_read_sched_clock, 32, rate);
79
+	system_clock = timer_of_base(to) + OSTM_CNT;
80
+	sched_clock_register(ostm_read_sched_clock, 32, timer_of_rate(to));
10681 }
10782 
10883 static int ostm_clock_event_next(unsigned long delta,
109
-				     struct clock_event_device *ced)
84
+				 struct clock_event_device *ced)
11085 {
111
-	struct ostm_device *ostm = ced_to_ostm(ced);
86
+	struct timer_of *to = to_timer_of(ced);
11287 
113
-	ostm_timer_stop(ostm);
88
+	ostm_timer_stop(to);
11489 
115
-	writel(delta, ostm->base + OSTM_CMP);
116
-	writeb(CTL_ONESHOT, ostm->base + OSTM_CTL);
117
-	writeb(TS, ostm->base + OSTM_TS);
90
+	writel(delta, timer_of_base(to) + OSTM_CMP);
91
+	writeb(CTL_ONESHOT, timer_of_base(to) + OSTM_CTL);
92
+	writeb(TS, timer_of_base(to) + OSTM_TS);
11893 
11994 	return 0;
12095 }
12196 
12297 static int ostm_shutdown(struct clock_event_device *ced)
12398 {
124
-	struct ostm_device *ostm = ced_to_ostm(ced);
99
+	struct timer_of *to = to_timer_of(ced);
125100 
126
-	ostm_timer_stop(ostm);
101
+	ostm_timer_stop(to);
127102 
128103 	return 0;
129104 }
130105 static int ostm_set_periodic(struct clock_event_device *ced)
131106 {
132
-	struct ostm_device *ostm = ced_to_ostm(ced);
107
+	struct timer_of *to = to_timer_of(ced);
133108 
134109 	if (clockevent_state_oneshot(ced) || clockevent_state_periodic(ced))
135
-		ostm_timer_stop(ostm);
110
+		ostm_timer_stop(to);
136111 
137
-	writel(ostm->ticks_per_jiffy - 1, ostm->base + OSTM_CMP);
138
-	writeb(CTL_PERIODIC, ostm->base + OSTM_CTL);
139
-	writeb(TS, ostm->base + OSTM_TS);
112
+	writel(timer_of_period(to) - 1, timer_of_base(to) + OSTM_CMP);
113
+	writeb(CTL_PERIODIC, timer_of_base(to) + OSTM_CTL);
114
+	writeb(TS, timer_of_base(to) + OSTM_TS);
140115 
141116 	return 0;
142117 }
143118 
144119 static int ostm_set_oneshot(struct clock_event_device *ced)
145120 {
146
-	struct ostm_device *ostm = ced_to_ostm(ced);
121
+	struct timer_of *to = to_timer_of(ced);
147122 
148
-	ostm_timer_stop(ostm);
123
+	ostm_timer_stop(to);
149124 
150125 	return 0;
151126 }
152127 
153128 static irqreturn_t ostm_timer_interrupt(int irq, void *dev_id)
154129 {
155
-	struct ostm_device *ostm = dev_id;
130
+	struct clock_event_device *ced = dev_id;
156131 
157
-	if (clockevent_state_oneshot(&ostm->ced))
158
-		ostm_timer_stop(ostm);
132
+	if (clockevent_state_oneshot(ced))
133
+		ostm_timer_stop(to_timer_of(ced));
159134 
160135 	/* notify clockevent layer */
161
-	if (ostm->ced.event_handler)
162
-		ostm->ced.event_handler(&ostm->ced);
136
+	if (ced->event_handler)
137
+		ced->event_handler(ced);
163138 
164139 	return IRQ_HANDLED;
165140 }
166141 
167
-static int __init ostm_init_clkevt(struct ostm_device *ostm, int irq,
168
-			unsigned long rate)
142
+static int __init ostm_init_clkevt(struct timer_of *to)
169143 {
170
-	struct clock_event_device *ced = &ostm->ced;
171
-	int ret = -ENXIO;
144
+	struct clock_event_device *ced = &to->clkevt;
172145 
173
-	ret = request_irq(irq, ostm_timer_interrupt,
174
-			  IRQF_TIMER | IRQF_IRQPOLL,
175
-			  "ostm", ostm);
176
-	if (ret) {
177
-		pr_err("ostm: failed to request irq\n");
178
-		return ret;
179
-	}
180
-
181
-	ced->name = "ostm";
182146 	ced->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC;
183147 	ced->set_state_shutdown = ostm_shutdown;
184148 	ced->set_state_periodic = ostm_set_periodic;
....@@ -187,79 +151,61 @@
187151 	ced->shift = 32;
188152 	ced->rating = 300;
189153 	ced->cpumask = cpumask_of(0);
190
-	clockevents_config_and_register(ced, rate, 0xf, 0xffffffff);
154
+	clockevents_config_and_register(ced, timer_of_rate(to), 0xf,
155
+					0xffffffff);
191156 
192157 	return 0;
193158 }
194159 
195160 static int __init ostm_init(struct device_node *np)
196161 {
197
-	struct ostm_device *ostm;
198
-	int ret = -EFAULT;
199
-	struct clk *ostm_clk = NULL;
200
-	int irq;
201
-	unsigned long rate;
162
+	struct timer_of *to;
163
+	int ret;
202164 
203
-	ostm = kzalloc(sizeof(*ostm), GFP_KERNEL);
204
-	if (!ostm)
165
+	to = kzalloc(sizeof(*to), GFP_KERNEL);
166
+	if (!to)
205167 		return -ENOMEM;
206168 
207
-	ostm->base = of_iomap(np, 0);
208
-	if (!ostm->base) {
209
-		pr_err("ostm: failed to remap I/O memory\n");
210
-		goto err;
169
+	to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
170
+	if (system_clock) {
171
+		/*
172
+		 * clock sources don't use interrupts, clock events do
173
+		 */
174
+		to->flags |= TIMER_OF_IRQ;
175
+		to->of_irq.flags = IRQF_TIMER | IRQF_IRQPOLL;
176
+		to->of_irq.handler = ostm_timer_interrupt;
211177 	}
212178 
213
-	irq = irq_of_parse_and_map(np, 0);
214
-	if (irq < 0) {
215
-		pr_err("ostm: Failed to get irq\n");
216
-		goto err;
217
-	}
218
-
219
-	ostm_clk = of_clk_get(np, 0);
220
-	if (IS_ERR(ostm_clk)) {
221
-		pr_err("ostm: Failed to get clock\n");
222
-		ostm_clk = NULL;
223
-		goto err;
224
-	}
225
-
226
-	ret = clk_prepare_enable(ostm_clk);
227
-	if (ret) {
228
-		pr_err("ostm: Failed to enable clock\n");
229
-		goto err;
230
-	}
231
-
232
-	rate = clk_get_rate(ostm_clk);
233
-	ostm->ticks_per_jiffy = (rate + HZ / 2) / HZ;
179
+	ret = timer_of_init(np, to);
180
+	if (ret)
181
+		goto err_free;
234182 
235183 	/*
236184 	 * First probed device will be used as system clocksource. Any
237185 	 * additional devices will be used as clock events.
238186 	 */
239187 	if (!system_clock) {
240
-		ret = ostm_init_clksrc(ostm, rate);
188
+		ret = ostm_init_clksrc(to);
189
+		if (ret)
190
+			goto err_cleanup;
241191 
242
-		if (!ret) {
243
-			ostm_init_sched_clock(ostm, rate);
244
-			pr_info("ostm: used for clocksource\n");
245
-		}
246
-
192
+		ostm_init_sched_clock(to);
193
+		pr_info("%pOF: used for clocksource\n", np);
247194 	} else {
248
-		ret = ostm_init_clkevt(ostm, irq, rate);
195
+		ret = ostm_init_clkevt(to);
196
+		if (ret)
197
+			goto err_cleanup;
249198 
250
-		if (!ret)
251
-			pr_info("ostm: used for clock events\n");
252
-	}
253
-
254
-err:
255
-	if (ret) {
256
-		clk_disable_unprepare(ostm_clk);
257
-		iounmap(ostm->base);
258
-		kfree(ostm);
259
-		return ret;
199
+		pr_info("%pOF: used for clock events\n", np);
260200 	}
261201 
262202 	return 0;
203
+
204
+err_cleanup:
205
+	timer_of_cleanup(to);
206
+err_free:
207
+	kfree(to);
208
+	return ret;
263209 }
264210 
265211 TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);