.. | .. |
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51 | 51 | const struct clk_ops *ops) |
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52 | 52 | { |
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53 | 53 | u32 reg; |
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54 | | - struct clk *clk; |
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| 54 | + struct clk_hw *hw_clk; |
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55 | 55 | struct socfpga_periph_clk *periph_clk; |
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56 | 56 | const char *clk_name = node->name; |
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57 | 57 | const char *parent_name[SOCFPGA_MAX_PARENTS]; |
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.. | .. |
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94 | 94 | init.parent_names = parent_name; |
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95 | 95 | |
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96 | 96 | periph_clk->hw.hw.init = &init; |
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| 97 | + hw_clk = &periph_clk->hw.hw; |
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97 | 98 | |
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98 | | - clk = clk_register(NULL, &periph_clk->hw.hw); |
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99 | | - if (WARN_ON(IS_ERR(clk))) { |
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| 99 | + if (clk_hw_register(NULL, hw_clk)) { |
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100 | 100 | kfree(periph_clk); |
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101 | 101 | return; |
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102 | 102 | } |
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103 | | - rc = of_clk_add_provider(node, of_clk_src_simple_get, clk); |
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| 103 | + rc = of_clk_add_provider(node, of_clk_src_simple_get, hw_clk); |
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104 | 104 | } |
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105 | 105 | |
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106 | 106 | void __init socfpga_periph_init(struct device_node *node) |
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