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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> |
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3 | 4 | * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org> |
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4 | 5 | * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org> |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or modify |
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7 | | - * it under the terms of the GNU General Public License version 2 as |
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8 | | - * published by the Free Software Foundation. |
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9 | 6 | * |
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10 | 7 | * Simple multiplexer clock implementation |
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11 | 8 | */ |
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.. | .. |
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25 | 22 | * rate - rate is only affected by parent switching. No clk_set_rate support |
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26 | 23 | * parent - parent is adjustable through clk_set_parent |
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27 | 24 | */ |
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| 25 | + |
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| 26 | +static inline u32 clk_mux_readl(struct clk_mux *mux) |
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| 27 | +{ |
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| 28 | + if (mux->flags & CLK_MUX_BIG_ENDIAN) |
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| 29 | + return ioread32be(mux->reg); |
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| 30 | + |
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| 31 | + return readl(mux->reg); |
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| 32 | +} |
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| 33 | + |
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| 34 | +static inline void clk_mux_writel(struct clk_mux *mux, u32 val) |
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| 35 | +{ |
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| 36 | + if (mux->flags & CLK_MUX_BIG_ENDIAN) |
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| 37 | + iowrite32be(val, mux->reg); |
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| 38 | + else |
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| 39 | + writel(val, mux->reg); |
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| 40 | +} |
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28 | 41 | |
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29 | 42 | int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags, |
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30 | 43 | unsigned int val) |
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.. | .. |
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76 | 89 | struct clk_mux *mux = to_clk_mux(hw); |
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77 | 90 | u32 val; |
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78 | 91 | |
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79 | | - val = clk_readl(mux->reg) >> mux->shift; |
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| 92 | + val = clk_mux_readl(mux) >> mux->shift; |
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80 | 93 | val &= mux->mask; |
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81 | 94 | |
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82 | 95 | return clk_mux_val_to_index(hw, mux->table, mux->flags, val); |
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.. | .. |
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97 | 110 | if (mux->flags & CLK_MUX_HIWORD_MASK) { |
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98 | 111 | reg = mux->mask << (mux->shift + 16); |
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99 | 112 | } else { |
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100 | | - reg = clk_readl(mux->reg); |
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| 113 | + reg = clk_mux_readl(mux); |
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101 | 114 | reg &= ~(mux->mask << mux->shift); |
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102 | 115 | } |
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103 | 116 | val = val << mux->shift; |
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104 | 117 | reg |= val; |
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105 | | - clk_writel(reg, mux->reg); |
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| 118 | + clk_mux_writel(mux, reg); |
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106 | 119 | |
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107 | 120 | if (mux->lock) |
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108 | 121 | spin_unlock_irqrestore(mux->lock, flags); |
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.. | .. |
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132 | 145 | }; |
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133 | 146 | EXPORT_SYMBOL_GPL(clk_mux_ro_ops); |
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134 | 147 | |
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135 | | -struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name, |
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136 | | - const char * const *parent_names, u8 num_parents, |
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137 | | - unsigned long flags, |
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138 | | - void __iomem *reg, u8 shift, u32 mask, |
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| 148 | +struct clk_hw *__clk_hw_register_mux(struct device *dev, struct device_node *np, |
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| 149 | + const char *name, u8 num_parents, |
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| 150 | + const char * const *parent_names, |
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| 151 | + const struct clk_hw **parent_hws, |
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| 152 | + const struct clk_parent_data *parent_data, |
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| 153 | + unsigned long flags, void __iomem *reg, u8 shift, u32 mask, |
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139 | 154 | u8 clk_mux_flags, u32 *table, spinlock_t *lock) |
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140 | 155 | { |
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141 | 156 | struct clk_mux *mux; |
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142 | 157 | struct clk_hw *hw; |
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143 | 158 | struct clk_init_data init = {}; |
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144 | 159 | u8 width = 0; |
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145 | | - int ret; |
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| 160 | + int ret = -EINVAL; |
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146 | 161 | |
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147 | 162 | if (clk_mux_flags & CLK_MUX_HIWORD_MASK) { |
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148 | 163 | width = fls(mask) - ffs(mask) + 1; |
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.. | .. |
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162 | 177 | init.ops = &clk_mux_ro_ops; |
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163 | 178 | else |
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164 | 179 | init.ops = &clk_mux_ops; |
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165 | | - init.flags = flags | CLK_IS_BASIC; |
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| 180 | + init.flags = flags; |
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166 | 181 | init.parent_names = parent_names; |
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| 182 | + init.parent_data = parent_data; |
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| 183 | + init.parent_hws = parent_hws; |
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167 | 184 | init.num_parents = num_parents; |
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168 | 185 | |
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169 | 186 | /* struct clk_mux assignments */ |
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.. | .. |
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176 | 193 | mux->hw.init = &init; |
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177 | 194 | |
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178 | 195 | hw = &mux->hw; |
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179 | | - ret = clk_hw_register(dev, hw); |
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| 196 | + if (dev || !np) |
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| 197 | + ret = clk_hw_register(dev, hw); |
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| 198 | + else if (np) |
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| 199 | + ret = of_clk_hw_register(np, hw); |
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180 | 200 | if (ret) { |
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181 | 201 | kfree(mux); |
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182 | 202 | hw = ERR_PTR(ret); |
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.. | .. |
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184 | 204 | |
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185 | 205 | return hw; |
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186 | 206 | } |
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187 | | -EXPORT_SYMBOL_GPL(clk_hw_register_mux_table); |
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| 207 | +EXPORT_SYMBOL_GPL(__clk_hw_register_mux); |
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188 | 208 | |
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189 | 209 | struct clk *clk_register_mux_table(struct device *dev, const char *name, |
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190 | 210 | const char * const *parent_names, u8 num_parents, |
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191 | | - unsigned long flags, |
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192 | | - void __iomem *reg, u8 shift, u32 mask, |
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| 211 | + unsigned long flags, void __iomem *reg, u8 shift, u32 mask, |
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193 | 212 | u8 clk_mux_flags, u32 *table, spinlock_t *lock) |
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194 | 213 | { |
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195 | 214 | struct clk_hw *hw; |
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196 | 215 | |
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197 | | - hw = clk_hw_register_mux_table(dev, name, parent_names, num_parents, |
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198 | | - flags, reg, shift, mask, clk_mux_flags, |
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199 | | - table, lock); |
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| 216 | + hw = clk_hw_register_mux_table(dev, name, parent_names, |
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| 217 | + num_parents, flags, reg, shift, mask, |
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| 218 | + clk_mux_flags, table, lock); |
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200 | 219 | if (IS_ERR(hw)) |
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201 | 220 | return ERR_CAST(hw); |
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202 | 221 | return hw->clk; |
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203 | 222 | } |
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204 | 223 | EXPORT_SYMBOL_GPL(clk_register_mux_table); |
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205 | | - |
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206 | | -struct clk *clk_register_mux(struct device *dev, const char *name, |
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207 | | - const char * const *parent_names, u8 num_parents, |
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208 | | - unsigned long flags, |
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209 | | - void __iomem *reg, u8 shift, u8 width, |
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210 | | - u8 clk_mux_flags, spinlock_t *lock) |
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211 | | -{ |
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212 | | - u32 mask = BIT(width) - 1; |
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213 | | - |
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214 | | - return clk_register_mux_table(dev, name, parent_names, num_parents, |
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215 | | - flags, reg, shift, mask, clk_mux_flags, |
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216 | | - NULL, lock); |
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217 | | -} |
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218 | | -EXPORT_SYMBOL_GPL(clk_register_mux); |
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219 | | - |
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220 | | -struct clk_hw *clk_hw_register_mux(struct device *dev, const char *name, |
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221 | | - const char * const *parent_names, u8 num_parents, |
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222 | | - unsigned long flags, |
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223 | | - void __iomem *reg, u8 shift, u8 width, |
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224 | | - u8 clk_mux_flags, spinlock_t *lock) |
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225 | | -{ |
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226 | | - u32 mask = BIT(width) - 1; |
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227 | | - |
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228 | | - return clk_hw_register_mux_table(dev, name, parent_names, num_parents, |
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229 | | - flags, reg, shift, mask, clk_mux_flags, |
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230 | | - NULL, lock); |
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231 | | -} |
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232 | | -EXPORT_SYMBOL_GPL(clk_hw_register_mux); |
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233 | 224 | |
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234 | 225 | void clk_unregister_mux(struct clk *clk) |
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235 | 226 | { |
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