add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/drivers/clk/clk-axi-clkgen.c
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@@ -1,11 +1,9 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * AXI clkgen driver
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  *
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  * Copyright 2012-2013 Analog Devices Inc.
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  *  Author: Lars-Peter Clausen <lars@metafoo.de>
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- *
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- * Licensed under the GPL-2.
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- *
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  */
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8
 
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 #include <linux/platform_device.h>
..
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@@ -29,19 +27,23 @@
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27
 
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 #define AXI_CLKGEN_V2_DRP_STATUS_BUSY	BIT(16)
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29
 
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+#define MMCM_REG_CLKOUT5_2	0x07
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 #define MMCM_REG_CLKOUT0_1	0x08
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 #define MMCM_REG_CLKOUT0_2	0x09
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+#define MMCM_REG_CLKOUT6_2	0x13
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 #define MMCM_REG_CLK_FB1	0x14
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 #define MMCM_REG_CLK_FB2	0x15
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 #define MMCM_REG_CLK_DIV	0x16
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 #define MMCM_REG_LOCK1		0x18
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 #define MMCM_REG_LOCK2		0x19
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 #define MMCM_REG_LOCK3		0x1a
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+#define MMCM_REG_POWER		0x28
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 #define MMCM_REG_FILTER1	0x4e
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 #define MMCM_REG_FILTER2	0x4f
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43
 
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 #define MMCM_CLKOUT_NOCOUNT	BIT(6)
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45
 
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+#define MMCM_CLK_DIV_DIVIDE	BIT(11)
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 #define MMCM_CLK_DIV_NOCOUNT	BIT(12)
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48
 
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 struct axi_clkgen {
..
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@@ -109,6 +111,8 @@
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 	unsigned long d, d_min, d_max, _d_min, _d_max;
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 	unsigned long m, m_min, m_max;
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 	unsigned long f, dout, best_f, fvco;
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+	unsigned long fract_shift = 0;
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+	unsigned long fvco_min_fract, fvco_max_fract;
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 	fin /= 1000;
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 	fout /= 1000;
..
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@@ -121,42 +125,89 @@
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 	d_min = max_t(unsigned long, DIV_ROUND_UP(fin, fpfd_max), 1);
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 	d_max = min_t(unsigned long, fin / fpfd_min, 80);
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-	m_min = max_t(unsigned long, DIV_ROUND_UP(fvco_min, fin) * d_min, 1);
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-	m_max = min_t(unsigned long, fvco_max * d_max / fin, 64);
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+again:
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+	fvco_min_fract = fvco_min << fract_shift;
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+	fvco_max_fract = fvco_max << fract_shift;
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+
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+	m_min = max_t(unsigned long, DIV_ROUND_UP(fvco_min_fract, fin) * d_min, 1);
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+	m_max = min_t(unsigned long, fvco_max_fract * d_max / fin, 64 << fract_shift);
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 	for (m = m_min; m <= m_max; m++) {
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-		_d_min = max(d_min, DIV_ROUND_UP(fin * m, fvco_max));
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-		_d_max = min(d_max, fin * m / fvco_min);
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+		_d_min = max(d_min, DIV_ROUND_UP(fin * m, fvco_max_fract));
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+		_d_max = min(d_max, fin * m / fvco_min_fract);
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 		for (d = _d_min; d <= _d_max; d++) {
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 			fvco = fin * m / d;
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 			dout = DIV_ROUND_CLOSEST(fvco, fout);
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-			dout = clamp_t(unsigned long, dout, 1, 128);
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+			dout = clamp_t(unsigned long, dout, 1, 128 << fract_shift);
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 			f = fvco / dout;
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 			if (abs(f - fout) < abs(best_f - fout)) {
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 				best_f = f;
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 				*best_d = d;
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-				*best_m = m;
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-				*best_dout = dout;
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+				*best_m = m << (3 - fract_shift);
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+				*best_dout = dout << (3 - fract_shift);
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 				if (best_f == fout)
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 					return;
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 			}
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 		}
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 	}
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+
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+	/* Lets see if we find a better setting in fractional mode */
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+	if (fract_shift == 0) {
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+		fract_shift = 3;
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+		goto again;
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+	}
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 }
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162
 
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-static void axi_clkgen_calc_clk_params(unsigned int divider, unsigned int *low,
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-	unsigned int *high, unsigned int *edge, unsigned int *nocount)
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-{
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-	if (divider == 1)
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-		*nocount = 1;
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-	else
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-		*nocount = 0;
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+struct axi_clkgen_div_params {
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+	unsigned int low;
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+	unsigned int high;
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+	unsigned int edge;
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+	unsigned int nocount;
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+	unsigned int frac_en;
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+	unsigned int frac;
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+	unsigned int frac_wf_f;
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+	unsigned int frac_wf_r;
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+	unsigned int frac_phase;
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+};
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-	*high = divider / 2;
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-	*edge = divider % 2;
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-	*low = divider - *high;
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+static void axi_clkgen_calc_clk_params(unsigned int divider,
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+	unsigned int frac_divider, struct axi_clkgen_div_params *params)
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+{
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+
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+	memset(params, 0x0, sizeof(*params));
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+
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+	if (divider == 1) {
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+		params->nocount = 1;
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+		return;
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+	}
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+
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+	if (frac_divider == 0) {
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+		params->high = divider / 2;
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+		params->edge = divider % 2;
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+		params->low = divider - params->high;
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+	} else {
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+		params->frac_en = 1;
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+		params->frac = frac_divider;
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+
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+		params->high = divider / 2;
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+		params->edge = divider % 2;
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+		params->low = params->high;
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+
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+		if (params->edge == 0) {
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+			params->high--;
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+			params->frac_wf_r = 1;
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+		}
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+
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+		if (params->edge == 0 || frac_divider == 1)
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+			params->low--;
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+		if (((params->edge == 0) ^ (frac_divider == 1)) ||
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+			(divider == 2 && frac_divider == 1))
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+			params->frac_wf_f = 1;
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+
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+		params->frac_phase = params->edge * 4 + frac_divider / 2;
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+	}
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 }
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 static void axi_clkgen_write(struct axi_clkgen *axi_clkgen,
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@@ -248,15 +299,29 @@
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 	return container_of(clk_hw, struct axi_clkgen, clk_hw);
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 }
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+static void axi_clkgen_set_div(struct axi_clkgen *axi_clkgen,
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+	unsigned int reg1, unsigned int reg2, unsigned int reg3,
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+	struct axi_clkgen_div_params *params)
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+{
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+	axi_clkgen_mmcm_write(axi_clkgen, reg1,
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+		(params->high << 6) | params->low, 0xefff);
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+	axi_clkgen_mmcm_write(axi_clkgen, reg2,
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+		(params->frac << 12) | (params->frac_en << 11) |
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+		(params->frac_wf_r << 10) | (params->edge << 7) |
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+		(params->nocount << 6), 0x7fff);
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+	if (reg3 != 0) {
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+		axi_clkgen_mmcm_write(axi_clkgen, reg3,
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+			(params->frac_phase << 11) | (params->frac_wf_f << 10), 0x3c00);
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+	}
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+}
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+
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 static int axi_clkgen_set_rate(struct clk_hw *clk_hw,
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 	unsigned long rate, unsigned long parent_rate)
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 {
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 	struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw);
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 	unsigned int d, m, dout;
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-	unsigned int nocount;
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-	unsigned int high;
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-	unsigned int edge;
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-	unsigned int low;
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+	struct axi_clkgen_div_params params;
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+	uint32_t power = 0;
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 	uint32_t filter;
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 	uint32_t lock;
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..
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@@ -268,24 +333,26 @@
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 	if (d == 0 || dout == 0 || m == 0)
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 		return -EINVAL;
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+	if ((dout & 0x7) != 0 || (m & 0x7) != 0)
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+		power |= 0x9800;
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+
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+	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_POWER, power, 0x9800);
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+
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 	filter = axi_clkgen_lookup_filter(m - 1);
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 	lock = axi_clkgen_lookup_lock(m - 1);
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343
 
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-	axi_clkgen_calc_clk_params(dout, &low, &high, &edge, &nocount);
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-	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLKOUT0_1,
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-		(high << 6) | low, 0xefff);
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-	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLKOUT0_2,
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-		(edge << 7) | (nocount << 6), 0x03ff);
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+	axi_clkgen_calc_clk_params(dout >> 3, dout & 0x7, &params);
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+	axi_clkgen_set_div(axi_clkgen,  MMCM_REG_CLKOUT0_1, MMCM_REG_CLKOUT0_2,
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+		MMCM_REG_CLKOUT5_2, &params);
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-	axi_clkgen_calc_clk_params(d, &low, &high, &edge, &nocount);
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+	axi_clkgen_calc_clk_params(d, 0, &params);
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 	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLK_DIV,
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-		(edge << 13) | (nocount << 12) | (high << 6) | low, 0x3fff);
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+		(params.edge << 13) | (params.nocount << 12) |
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+		(params.high << 6) | params.low, 0x3fff);
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-	axi_clkgen_calc_clk_params(m, &low, &high, &edge, &nocount);
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-	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLK_FB1,
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-		(high << 6) | low, 0xefff);
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-	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_CLK_FB2,
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-		(edge << 7) | (nocount << 6), 0x03ff);
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+	axi_clkgen_calc_clk_params(m >> 3, m & 0x7, &params);
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+	axi_clkgen_set_div(axi_clkgen,  MMCM_REG_CLK_FB1, MMCM_REG_CLK_FB2,
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+		MMCM_REG_CLKOUT6_2, &params);
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 	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_LOCK1, lock & 0x3ff, 0x3ff);
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 	axi_clkgen_mmcm_write(axi_clkgen, MMCM_REG_LOCK2,
..
..
@@ -315,35 +382,51 @@
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 	return min_t(unsigned long long, tmp, LONG_MAX);
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383
 }
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384
 
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+static unsigned int axi_clkgen_get_div(struct axi_clkgen *axi_clkgen,
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+	unsigned int reg1, unsigned int reg2)
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+{
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+	unsigned int val1, val2;
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+	unsigned int div;
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+
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+	axi_clkgen_mmcm_read(axi_clkgen, reg2, &val2);
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+	if (val2 & MMCM_CLKOUT_NOCOUNT)
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+		return 8;
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+
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+	axi_clkgen_mmcm_read(axi_clkgen, reg1, &val1);
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+
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+	div = (val1 & 0x3f) + ((val1 >> 6) & 0x3f);
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+	div <<= 3;
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+
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+	if (val2 & MMCM_CLK_DIV_DIVIDE) {
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+		if ((val2 & BIT(7)) && (val2 & 0x7000) != 0x1000)
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+			div += 8;
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+		else
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+			div += 16;
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+
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+		div += (val2 >> 12) & 0x7;
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+	}
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+
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+	return div;
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+}
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+
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 static unsigned long axi_clkgen_recalc_rate(struct clk_hw *clk_hw,
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 	unsigned long parent_rate)
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 {
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 	struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw);
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 	unsigned int d, m, dout;
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-	unsigned int reg;
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 	unsigned long long tmp;
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+	unsigned int val;
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-	axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLKOUT0_2, &reg);
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-	if (reg & MMCM_CLKOUT_NOCOUNT) {
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-		dout = 1;
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-	} else {
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-		axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLKOUT0_1, &reg);
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-		dout = (reg & 0x3f) + ((reg >> 6) & 0x3f);
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-	}
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+	dout = axi_clkgen_get_div(axi_clkgen, MMCM_REG_CLKOUT0_1,
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+		MMCM_REG_CLKOUT0_2);
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+	m = axi_clkgen_get_div(axi_clkgen, MMCM_REG_CLK_FB1,
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+		MMCM_REG_CLK_FB2);
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424
 
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-	axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLK_DIV, &reg);
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-	if (reg & MMCM_CLK_DIV_NOCOUNT)
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+	axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLK_DIV, &val);
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+	if (val & MMCM_CLK_DIV_NOCOUNT)
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 		d = 1;
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 	else
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-		d = (reg & 0x3f) + ((reg >> 6) & 0x3f);
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-
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-	axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLK_FB2, &reg);
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-	if (reg & MMCM_CLKOUT_NOCOUNT) {
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-		m = 1;
343
-	} else {
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-		axi_clkgen_mmcm_read(axi_clkgen, MMCM_REG_CLK_FB1, &reg);
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-		m = (reg & 0x3f) + ((reg >> 6) & 0x3f);
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-	}
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+		d = (val & 0x3f) + ((val >> 6) & 0x3f);
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430
 
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431
 	if (d == 0 || dout == 0)
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 		return 0;
..
..
@@ -411,7 +494,7 @@
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 {
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 	const struct of_device_id *id;
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 	struct axi_clkgen *axi_clkgen;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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 	const char *parent_names[2];
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 	const char *clk_name;
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 	struct resource *mem;