hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/bcma/driver_chipcommon_pmu.c
....@@ -233,8 +233,10 @@
233233
234234 switch (bus->chipinfo.id) {
235235 case BCMA_CHIP_ID_BCM4313:
236
- /* enable 12 mA drive strenth for 4313 and set chipControl
237
- register bit 1 */
236
+ /*
237
+ * enable 12 mA drive strenth for 4313 and set chipControl
238
+ * register bit 1
239
+ */
238240 bcma_chipco_chipctl_maskset(cc, 0,
239241 ~BCMA_CCTRL_4313_12MA_LED_DRIVE,
240242 BCMA_CCTRL_4313_12MA_LED_DRIVE);
....@@ -246,8 +248,10 @@
246248 break;
247249 case BCMA_CHIP_ID_BCM43224:
248250 case BCMA_CHIP_ID_BCM43421:
249
- /* enable 12 mA drive strenth for 43224 and set chipControl
250
- register bit 15 */
251
+ /*
252
+ * enable 12 mA drive strenth for 43224 and set chipControl
253
+ * register bit 15
254
+ */
251255 if (bus->chipinfo.rev == 0) {
252256 bcma_cc_maskset32(cc, BCMA_CC_CHIPCTL,
253257 ~BCMA_CCTRL_43224_GPIO_TOGGLE,
....@@ -500,8 +504,10 @@
500504 case BCMA_CHIP_ID_BCM53572:
501505 /* 5357[ab]0, 43236[ab]0, and 6362b0 */
502506
503
- /* BCM5357 needs to touch PLL1_PLLCTL[02],
504
- so offset PLL0_PLLCTL[02] by 6 */
507
+ /*
508
+ * BCM5357 needs to touch PLL1_PLLCTL[02],
509
+ * so offset PLL0_PLLCTL[02] by 6
510
+ */
505511 phypll_offset = (bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
506512 bus->chipinfo.id == BCMA_CHIP_ID_BCM4749 ||
507513 bus->chipinfo.id == BCMA_CHIP_ID_BCM53572) ? 6 : 0;
....@@ -619,8 +625,10 @@
619625 case BCMA_CHIP_ID_BCM43228:
620626 case BCMA_CHIP_ID_BCM43428:
621627 /* LCNXN */
622
- /* PLL Settings for spur avoidance on/off mode,
623
- no on2 support for 43228A0 */
628
+ /*
629
+ * PLL Settings for spur avoidance on/off mode,
630
+ * no on2 support for 43228A0
631
+ */
624632 if (spuravoid == 1) {
625633 bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
626634 0x01100014);