hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/drivers/acpi/pci_root.c
....@@ -1,22 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
34 *
45 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
56 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6
- *
7
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8
- *
9
- * This program is free software; you can redistribute it and/or modify
10
- * it under the terms of the GNU General Public License as published by
11
- * the Free Software Foundation; either version 2 of the License, or (at
12
- * your option) any later version.
13
- *
14
- * This program is distributed in the hope that it will be useful, but
15
- * WITHOUT ANY WARRANTY; without even the implied warranty of
16
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17
- * General Public License for more details.
18
- *
19
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
207 */
218
229 #include <linux/kernel.h>
....@@ -28,18 +15,13 @@
2815 #include <linux/pm_runtime.h>
2916 #include <linux/pci.h>
3017 #include <linux/pci-acpi.h>
31
-#include <linux/pci-aspm.h>
3218 #include <linux/dmar.h>
3319 #include <linux/acpi.h>
3420 #include <linux/slab.h>
3521 #include <linux/dmi.h>
3622 #include <linux/platform_data/x86/apple.h>
37
-#include <acpi/apei.h> /* for acpi_hest_init() */
38
-
3923 #include "internal.h"
4024
41
-#define _COMPONENT ACPI_PCI_COMPONENT
42
-ACPI_MODULE_NAME("pci_root");
4325 #define ACPI_PCI_ROOT_CLASS "pci_bridge"
4426 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
4527 static int acpi_pci_root_add(struct acpi_device *device,
....@@ -76,7 +58,7 @@
7658
7759 /**
7860 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
79
- * @handle - the ACPI CA node in question.
61
+ * @handle: the ACPI CA node in question.
8062 *
8163 * Note: we could make this API take a struct acpi_device * instead, but
8264 * for now, it's more convenient to operate on an acpi_handle.
....@@ -145,6 +127,8 @@
145127 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
146128 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
147129 { OSC_PCI_MSI_SUPPORT, "MSI" },
130
+ { OSC_PCI_EDR_SUPPORT, "EDR" },
131
+ { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
148132 };
149133
150134 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
....@@ -154,6 +138,7 @@
154138 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
155139 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
156140 { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
141
+ { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
157142 };
158143
159144 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
....@@ -166,7 +151,7 @@
166151 buf[0] = '\0';
167152 for (i = 0, entry = table; i < size; i++, entry++)
168153 if (word & entry->bit)
169
- len += snprintf(buf + len, sizeof(buf) - len, "%s%s",
154
+ len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
170155 len ? " " : "", entry->desc);
171156
172157 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
....@@ -421,7 +406,8 @@
421406 }
422407 EXPORT_SYMBOL(acpi_pci_osc_control_set);
423408
424
-static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
409
+static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
410
+ bool is_pcie)
425411 {
426412 u32 support, control, requested;
427413 acpi_status status;
....@@ -445,20 +431,28 @@
445431 * PCI domains, so we indicate this in _OSC support capabilities.
446432 */
447433 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
434
+ support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
448435 if (pci_ext_cfg_avail())
449436 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
450437 if (pcie_aspm_support_enabled())
451438 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
452439 if (pci_msi_enabled())
453440 support |= OSC_PCI_MSI_SUPPORT;
441
+ if (IS_ENABLED(CONFIG_PCIE_EDR))
442
+ support |= OSC_PCI_EDR_SUPPORT;
454443
455444 decode_osc_support(root, "OS supports", support);
456445 status = acpi_pci_osc_support(root, support);
457446 if (ACPI_FAILURE(status)) {
447
+ *no_aspm = 1;
448
+
449
+ /* _OSC is optional for PCI host bridges */
450
+ if ((status == AE_NOT_FOUND) && !is_pcie)
451
+ return;
452
+
458453 dev_info(&device->dev, "_OSC failed (%s)%s\n",
459454 acpi_format_exception(status),
460455 pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
461
- *no_aspm = 1;
462456 return;
463457 }
464458
....@@ -485,13 +479,17 @@
485479 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
486480 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
487481
488
- if (pci_aer_available()) {
489
- if (aer_acpi_firmware_first())
490
- dev_info(&device->dev,
491
- "PCIe AER handled by firmware\n");
492
- else
493
- control |= OSC_PCI_EXPRESS_AER_CONTROL;
494
- }
482
+ if (pci_aer_available())
483
+ control |= OSC_PCI_EXPRESS_AER_CONTROL;
484
+
485
+ /*
486
+ * Per the Downstream Port Containment Related Enhancements ECN to
487
+ * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
488
+ * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
489
+ * and EDR.
490
+ */
491
+ if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
492
+ control |= OSC_PCI_EXPRESS_DPC_CONTROL;
495493
496494 requested = control;
497495 status = acpi_pci_osc_control_set(handle, &control,
....@@ -534,6 +532,7 @@
534532 acpi_handle handle = device->handle;
535533 int no_aspm = 0;
536534 bool hotadd = system_state == SYSTEM_RUNNING;
535
+ bool is_pcie;
537536
538537 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
539538 if (!root)
....@@ -591,7 +590,8 @@
591590
592591 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
593592
594
- negotiate_os_control(root, &no_aspm);
593
+ is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
594
+ negotiate_os_control(root, &no_aspm, is_pcie);
595595
596596 /*
597597 * TBD: Need PCI interface for enumeration/configuration of roots.
....@@ -884,6 +884,7 @@
884884 int node = acpi_get_node(device->handle);
885885 struct pci_bus *bus;
886886 struct pci_host_bridge *host_bridge;
887
+ union acpi_object *obj;
887888
888889 info->root = root;
889890 info->bridge = device;
....@@ -919,6 +920,19 @@
919920 host_bridge->native_pme = 0;
920921 if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
921922 host_bridge->native_ltr = 0;
923
+ if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
924
+ host_bridge->native_dpc = 0;
925
+
926
+ /*
927
+ * Evaluate the "PCI Boot Configuration" _DSM Function. If it
928
+ * exists and returns 0, we must preserve any PCI resource
929
+ * assignments made by firmware for this host bridge.
930
+ */
931
+ obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
932
+ DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
933
+ if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
934
+ host_bridge->preserve_config = 1;
935
+ ACPI_FREE(obj);
922936
923937 pci_scan_child_bus(bus);
924938 pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
....@@ -934,7 +948,6 @@
934948
935949 void __init acpi_pci_root_init(void)
936950 {
937
- acpi_hest_init();
938951 if (acpi_pci_disabled)
939952 return;
940953