add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/arch/xtensa/kernel/perf_event.c
..
..
@@ -1,12 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
1
2
 /*
2
3
  * Xtensa Performance Monitor Module driver
3
4
  * See Tensilica Debug User's Guide for PMU registers documentation.
4
5
  *
5
6
  * Copyright (C) 2015 Cadence Design Systems Inc.
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
10
7
  */
11
8
 
12
9
 #include <linux/interrupt.h>
..
..
@@ -16,17 +13,26 @@
16
13
 #include <linux/perf_event.h>
17
14
 #include <linux/platform_device.h>
18
15
 
16
+#include <asm/core.h>
19
17
 #include <asm/processor.h>
20
18
 #include <asm/stacktrace.h>
21
19
 
20
+#define XTENSA_HWVERSION_RG_2015_0	260000
21
+
22
+#if XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RG_2015_0
23
+#define XTENSA_PMU_ERI_BASE		0x00101000
24
+#else
25
+#define XTENSA_PMU_ERI_BASE		0x00001000
26
+#endif
27
+
22
28
 /* Global control/status for all perf counters */
23
-#define XTENSA_PMU_PMG			0x1000
29
+#define XTENSA_PMU_PMG			XTENSA_PMU_ERI_BASE
24
30
 /* Perf counter values */
25
-#define XTENSA_PMU_PM(i)		(0x1080 + (i) * 4)
31
+#define XTENSA_PMU_PM(i)		(XTENSA_PMU_ERI_BASE + 0x80 + (i) * 4)
26
32
 /* Perf counter control registers */
27
-#define XTENSA_PMU_PMCTRL(i)		(0x1100 + (i) * 4)
33
+#define XTENSA_PMU_PMCTRL(i)		(XTENSA_PMU_ERI_BASE + 0x100 + (i) * 4)
28
34
 /* Perf counter status registers */
29
-#define XTENSA_PMU_PMSTAT(i)		(0x1180 + (i) * 4)
35
+#define XTENSA_PMU_PMSTAT(i)		(XTENSA_PMU_ERI_BASE + 0x180 + (i) * 4)
30
36
 
31
37
 #define XTENSA_PMU_PMG_PMEN		0x1
32
38
 
..
..
@@ -365,9 +371,7 @@
365
371
 	struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events);
366
372
 	unsigned i;
367
373
 
368
-	for (i = find_first_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS);
369
-	     i < XCHAL_NUM_PERF_COUNTERS;
370
-	     i = find_next_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS, i + 1)) {
374
+	for_each_set_bit(i, ev->used_mask, XCHAL_NUM_PERF_COUNTERS) {
371
375
 		uint32_t v = get_er(XTENSA_PMU_PMSTAT(i));
372
376
 		struct perf_event *event = ev->event[i];
373
377
 		struct hw_perf_event *hwc = &event->hw;