kernel/arch/xtensa/include/asm/cacheflush.h
.. .. @@ -145,6 +145,8 @@ 145 145 146 146 #endif 147 147 148 +#define flush_icache_user_range flush_icache_range149 +148 150 /* Ensure consistency between data and instruction cache. */ 149 151 #define local_flush_icache_range(start, end) \ 150 152 do { \