hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/arch/x86/kernel/x86_init.c
....@@ -20,18 +20,40 @@
2020 #include <asm/irq.h>
2121 #include <asm/io_apic.h>
2222 #include <asm/hpet.h>
23
-#include <asm/pat.h>
23
+#include <asm/memtype.h>
2424 #include <asm/tsc.h>
2525 #include <asm/iommu.h>
2626 #include <asm/mach_traps.h>
27
+#include <asm/irqdomain.h>
2728
2829 void x86_init_noop(void) { }
2930 void __init x86_init_uint_noop(unsigned int unused) { }
3031 static int __init iommu_init_noop(void) { return 0; }
3132 static void iommu_shutdown_noop(void) { }
32
-static bool __init bool_x86_init_noop(void) { return false; }
33
-static void x86_op_int_noop(int cpu) { }
34
-static u64 u64_x86_init_noop(void) { return 0; }
33
+bool __init bool_x86_init_noop(void) { return false; }
34
+void x86_op_int_noop(int cpu) { }
35
+static int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
36
+static void get_rtc_noop(struct timespec64 *now) { }
37
+
38
+static __initconst const struct of_device_id of_cmos_match[] = {
39
+ { .compatible = "motorola,mc146818" },
40
+ {}
41
+};
42
+
43
+/*
44
+ * Allow devicetree configured systems to disable the RTC by setting the
45
+ * corresponding DT node's status property to disabled. Code is optimized
46
+ * out for CONFIG_OF=n builds.
47
+ */
48
+static __init void x86_wallclock_init(void)
49
+{
50
+ struct device_node *node = of_find_matching_node(NULL, of_cmos_match);
51
+
52
+ if (node && !of_device_is_available(node)) {
53
+ x86_platform.get_wallclock = get_rtc_noop;
54
+ x86_platform.set_wallclock = set_rtc_noop;
55
+ }
56
+}
3557
3658 /*
3759 * The platform setup functions are preset with the default functions
....@@ -46,11 +68,7 @@
4668 },
4769
4870 .mpparse = {
49
- .mpc_record = x86_init_uint_noop,
5071 .setup_ioapic_ids = x86_init_noop,
51
- .mpc_apic_id = default_mpc_apic_id,
52
- .smp_read_mpc_oem = default_smp_read_mpc_oem,
53
- .mpc_oem_bus_info = default_mpc_oem_bus_info,
5472 .find_smp_config = default_find_smp_config,
5573 .get_smp_config = default_get_smp_config,
5674 },
....@@ -58,8 +76,9 @@
5876 .irqs = {
5977 .pre_vector_init = init_ISA_irqs,
6078 .intr_init = native_init_IRQ,
61
- .trap_init = x86_init_noop,
62
- .intr_mode_init = apic_intr_mode_init
79
+ .intr_mode_select = apic_intr_mode_select,
80
+ .intr_mode_init = apic_intr_mode_init,
81
+ .create_pci_msi_domain = native_create_pci_msi_domain,
6382 },
6483
6584 .oem = {
....@@ -74,7 +93,7 @@
7493 .timers = {
7594 .setup_percpu_clockev = setup_boot_APIC_clock,
7695 .timer_init = hpet_time_init,
77
- .wallclock_init = x86_init_noop,
96
+ .wallclock_init = x86_wallclock_init,
7897 },
7998
8099 .iommu = {
....@@ -96,7 +115,8 @@
96115 },
97116
98117 .acpi = {
99
- .get_root_pointer = u64_x86_init_noop,
118
+ .set_root_pointer = x86_default_set_root_pointer,
119
+ .get_root_pointer = x86_default_get_root_pointer,
100120 .reduced_hw_early_init = acpi_generic_reduced_hw_init,
101121 },
102122 };
....@@ -126,28 +146,10 @@
126146
127147 #if defined(CONFIG_PCI_MSI)
128148 struct x86_msi_ops x86_msi __ro_after_init = {
129
- .setup_msi_irqs = native_setup_msi_irqs,
130
- .teardown_msi_irq = native_teardown_msi_irq,
131
- .teardown_msi_irqs = default_teardown_msi_irqs,
132149 .restore_msi_irqs = default_restore_msi_irqs,
133150 };
134151
135152 /* MSI arch specific hooks */
136
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
137
-{
138
- return x86_msi.setup_msi_irqs(dev, nvec, type);
139
-}
140
-
141
-void arch_teardown_msi_irqs(struct pci_dev *dev)
142
-{
143
- x86_msi.teardown_msi_irqs(dev);
144
-}
145
-
146
-void arch_teardown_msi_irq(unsigned int irq)
147
-{
148
- x86_msi.teardown_msi_irq(irq);
149
-}
150
-
151153 void arch_restore_msi_irqs(struct pci_dev *dev)
152154 {
153155 x86_msi.restore_msi_irqs(dev);