hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/arch/s390/kernel/head64.S
....@@ -14,6 +14,7 @@
1414 #include <asm/asm-offsets.h>
1515 #include <asm/thread_info.h>
1616 #include <asm/page.h>
17
+#include <asm/ptrace.h>
1718
1819 __HEAD
1920 ENTRY(startup_continue)
....@@ -25,38 +26,17 @@
2526 0: larl %r1,tod_clock_base
2627 mvc 0(16,%r1),__LC_BOOT_CLOCK
2728 larl %r13,.LPG1 # get base
28
- lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
29
- lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
30
- # move IPL device to lowcore
31
- larl %r0,boot_vdso_data
32
- stg %r0,__LC_VDSO_PER_CPU
3329 #
3430 # Setup stack
3531 #
3632 larl %r14,init_task
3733 stg %r14,__LC_CURRENT
38
- larl %r15,init_thread_union
39
- aghi %r15,1<<(PAGE_SHIFT+THREAD_SIZE_ORDER) # init_task_union + THREAD_SIZE
40
- stg %r15,__LC_KERNEL_STACK # set end of kernel stack
41
- aghi %r15,-160
42
-#
43
-# Early setup functions that may not rely on an initialized bss section,
44
-# like moving the initrd. Returns with an initialized bss section.
45
-#
46
- brasl %r14,startup_init_nobss
47
-#
48
-# Early machine initialization and detection functions.
49
-#
50
- brasl %r14,startup_init
51
-
52
-# check control registers
53
- stctg %c0,%c15,0(%r15)
54
- oi 6(%r15),0x60 # enable sigp emergency & external call
55
- oi 4(%r15),0x10 # switch on low address proctection
56
- lctlg %c0,%c15,0(%r15)
57
-
58
- lam 0,15,.Laregs-.LPG1(%r13) # load acrs needed by uaccess
59
- brasl %r14,start_kernel # go to C code
34
+ larl %r15,init_thread_union+THREAD_SIZE-STACK_FRAME_OVERHEAD-__PT_SIZE
35
+#ifdef CONFIG_KASAN
36
+ brasl %r14,kasan_early_init
37
+#endif
38
+ brasl %r14,startup_init # s390 specific early init
39
+ brasl %r14,start_kernel # common init code
6040 #
6141 # We returned from start_kernel ?!? PANIK
6242 #
....@@ -65,37 +45,4 @@
6545
6646 .align 16
6747 .LPG1:
68
-.Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space
69
- .quad 0 # cr1: primary space segment table
70
- .quad .Lduct # cr2: dispatchable unit control table
71
- .quad 0 # cr3: instruction authorization
72
- .quad 0xffff # cr4: instruction authorization
73
- .quad .Lduct # cr5: primary-aste origin
74
- .quad 0 # cr6: I/O interrupts
75
- .quad 0 # cr7: secondary space segment table
76
- .quad 0 # cr8: access registers translation
77
- .quad 0 # cr9: tracing off
78
- .quad 0 # cr10: tracing off
79
- .quad 0 # cr11: tracing off
80
- .quad 0 # cr12: tracing off
81
- .quad 0 # cr13: home space segment table
82
- .quad 0xc0000000 # cr14: machine check handling off
83
- .quad .Llinkage_stack # cr15: linkage stack operations
84
-.Lpcmsk:.quad 0x0000000180000000
85
-.L4malign:.quad 0xffffffffffc00000
86
-.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
87
-.Lnop: .long 0x07000700
88
-.Lparmaddr:
89
- .quad PARMAREA
90
- .align 64
91
-.Lduct: .long 0,.Laste,.Laste,0,.Lduald,0,0,0
92
- .long 0,0,0,0,0,0,0,0
93
-.Laste: .quad 0,0xffffffffffffffff,0,0,0,0,0,0
94
- .align 128
95
-.Lduald:.rept 8
96
- .long 0x80000000,0,0,0 # invalid access-list entries
97
- .endr
98
-.Llinkage_stack:
99
- .long 0,0,0x89000000,0,0,0,0x8a000000,0
10048 .Ldw: .quad 0x0002000180000000,0x0000000000000000
101
-.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0