hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c
kernel/arch/riscv/lib/uaccess.S
....@@ -1,15 +1,14 @@
11 #include <linux/linkage.h>
2
+#include <asm-generic/export.h>
23 #include <asm/asm.h>
34 #include <asm/csr.h>
45
5
- .altmacro
66 .macro fixup op reg addr lbl
7
- LOCAL _epc
8
-_epc:
7
+100:
98 \op \reg, \addr
109 .section __ex_table,"a"
1110 .balign RISCV_SZPTR
12
- RISCV_PTR _epc, \lbl
11
+ RISCV_PTR 100b, \lbl
1312 .previous
1413 .endm
1514
....@@ -18,7 +17,7 @@
1817
1918 /* Enable access to user memory */
2019 li t6, SR_SUM
21
- csrs sstatus, t6
20
+ csrs CSR_STATUS, t6
2221
2322 add a3, a1, a2
2423 /* Use word-oriented copy only if low-order bits match */
....@@ -47,7 +46,7 @@
4746
4847 3:
4948 /* Disable access to user memory */
50
- csrc sstatus, t6
49
+ csrc CSR_STATUS, t6
5150 li a0, 0
5251 ret
5352 4: /* Edge case: unalignment */
....@@ -66,13 +65,15 @@
6665 j 3b
6766 ENDPROC(__asm_copy_to_user)
6867 ENDPROC(__asm_copy_from_user)
68
+EXPORT_SYMBOL(__asm_copy_to_user)
69
+EXPORT_SYMBOL(__asm_copy_from_user)
6970
7071
7172 ENTRY(__clear_user)
7273
7374 /* Enable access to user memory */
7475 li t6, SR_SUM
75
- csrs sstatus, t6
76
+ csrs CSR_STATUS, t6
7677
7778 add a3, a0, a1
7879 addi t0, a0, SZREG-1
....@@ -94,7 +95,7 @@
9495
9596 3:
9697 /* Disable access to user memory */
97
- csrc sstatus, t6
98
+ csrc CSR_STATUS, t6
9899 li a0, 0
99100 ret
100101 4: /* Edge case: unalignment */
....@@ -108,17 +109,18 @@
108109 bltu a0, a3, 5b
109110 j 3b
110111 ENDPROC(__clear_user)
112
+EXPORT_SYMBOL(__clear_user)
111113
112114 .section .fixup,"ax"
113115 .balign 4
114116 /* Fixup code for __copy_user(10) and __clear_user(11) */
115117 10:
116118 /* Disable access to user memory */
117
- csrs sstatus, t6
119
+ csrs CSR_STATUS, t6
118120 mv a0, a2
119121 ret
120122 11:
121
- csrs sstatus, t6
123
+ csrs CSR_STATUS, t6
122124 mv a0, a1
123125 ret
124126 .previous