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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/arch/powerpc/kernel/eeh_pe.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * The file intends to implement PE based on the information from
34  * platforms. Basically, there have 3 types of PEs: PHB/Bus/Device.
....@@ -6,20 +7,6 @@
67  * PE is only meaningful in one PHB domain.
78  *
89  * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2012.
9
- *
10
- * This program is free software; you can redistribute it and/or modify
11
- * it under the terms of the GNU General Public License as published by
12
- * the Free Software Foundation; either version 2 of the License, or
13
- * (at your option) any later version.
14
- *
15
- * This program is distributed in the hope that it will be useful,
16
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
17
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18
- * GNU General Public License for more details.
19
- *
20
- * You should have received a copy of the GNU General Public License
21
- * along with this program; if not, write to the Free Software
22
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
2310  */
2411 
2512 #include <linux/delay.h>
....@@ -75,7 +62,6 @@
7562 	pe->type = type;
7663 	pe->phb = phb;
7764 	INIT_LIST_HEAD(&pe->child_list);
78
-	INIT_LIST_HEAD(&pe->child);
7965 	INIT_LIST_HEAD(&pe->edevs);
8066 
8167 	pe->data = (void *)pe + ALIGN(sizeof(struct eeh_pe),
....@@ -107,6 +93,57 @@
10793 	pr_debug("EEH: Add PE for PHB#%x\n", phb->global_number);
10894 
10995 	return 0;
96
+}
97
+
98
+/**
99
+ * eeh_wait_state - Wait for PE state
100
+ * @pe: EEH PE
101
+ * @max_wait: maximal period in millisecond
102
+ *
103
+ * Wait for the state of associated PE. It might take some time
104
+ * to retrieve the PE's state.
105
+ */
106
+int eeh_wait_state(struct eeh_pe *pe, int max_wait)
107
+{
108
+	int ret;
109
+	int mwait;
110
+
111
+	/*
112
+	 * According to PAPR, the state of PE might be temporarily
113
+	 * unavailable. Under the circumstance, we have to wait
114
+	 * for indicated time determined by firmware. The maximal
115
+	 * wait time is 5 minutes, which is acquired from the original
116
+	 * EEH implementation. Also, the original implementation
117
+	 * also defined the minimal wait time as 1 second.
118
+	 */
119
+#define EEH_STATE_MIN_WAIT_TIME	(1000)
120
+#define EEH_STATE_MAX_WAIT_TIME	(300 * 1000)
121
+
122
+	while (1) {
123
+		ret = eeh_ops->get_state(pe, &mwait);
124
+
125
+		if (ret != EEH_STATE_UNAVAILABLE)
126
+			return ret;
127
+
128
+		if (max_wait <= 0) {
129
+			pr_warn("%s: Timeout when getting PE's state (%d)\n",
130
+				__func__, max_wait);
131
+			return EEH_STATE_NOT_SUPPORT;
132
+		}
133
+
134
+		if (mwait < EEH_STATE_MIN_WAIT_TIME) {
135
+			pr_warn("%s: Firmware returned bad wait value %d\n",
136
+				__func__, mwait);
137
+			mwait = EEH_STATE_MIN_WAIT_TIME;
138
+		} else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
139
+			pr_warn("%s: Firmware returned too long wait value %d\n",
140
+				__func__, mwait);
141
+			mwait = EEH_STATE_MAX_WAIT_TIME;
142
+		}
143
+
144
+		msleep(min(mwait, max_wait));
145
+		max_wait -= mwait;
146
+	}
110147 }
111148 
112149 /**
....@@ -194,70 +231,41 @@
194231  * The function is used to traverse the devices of the specified
195232  * PE and its child PEs.
196233  */
197
-void *eeh_pe_dev_traverse(struct eeh_pe *root,
234
+void eeh_pe_dev_traverse(struct eeh_pe *root,
198235 			  eeh_edev_traverse_func fn, void *flag)
199236 {
200237 	struct eeh_pe *pe;
201238 	struct eeh_dev *edev, *tmp;
202
-	void *ret;
203239 
204240 	if (!root) {
205241 		pr_warn("%s: Invalid PE %p\n",
206242 			__func__, root);
207
-		return NULL;
243
+		return;
208244 	}
209245 
210246 	/* Traverse root PE */
211
-	eeh_for_each_pe(root, pe) {
212
-		eeh_pe_for_each_dev(pe, edev, tmp) {
213
-			ret = fn(edev, flag);
214
-			if (ret)
215
-				return ret;
216
-		}
217
-	}
218
-
219
-	return NULL;
247
+	eeh_for_each_pe(root, pe)
248
+		eeh_pe_for_each_dev(pe, edev, tmp)
249
+			fn(edev, flag);
220250 }
221251 
222252 /**
223253  * __eeh_pe_get - Check the PE address
224
- * @data: EEH PE
225
- * @flag: EEH device
226254  *
227255  * For one particular PE, it can be identified by PE address
228256  * or tranditional BDF address. BDF address is composed of
229257  * Bus/Device/Function number. The extra data referred by flag
230258  * indicates which type of address should be used.
231259  */
232
-struct eeh_pe_get_flag {
233
-	int pe_no;
234
-	int config_addr;
235
-};
236
-
237260 static void *__eeh_pe_get(struct eeh_pe *pe, void *flag)
238261 {
239
-	struct eeh_pe_get_flag *tmp = (struct eeh_pe_get_flag *) flag;
262
+	int *target_pe = flag;
240263 
241
-	/* Unexpected PHB PE */
264
+	/* PHB PEs are special and should be ignored */
242265 	if (pe->type & EEH_PE_PHB)
243266 		return NULL;
244267 
245
-	/*
246
-	 * We prefer PE address. For most cases, we should
247
-	 * have non-zero PE address
248
-	 */
249
-	if (eeh_has_flag(EEH_VALID_PE_ZERO)) {
250
-		if (tmp->pe_no == pe->addr)
251
-			return pe;
252
-	} else {
253
-		if (tmp->pe_no &&
254
-		    (tmp->pe_no == pe->addr))
255
-			return pe;
256
-	}
257
-
258
-	/* Try BDF address */
259
-	if (tmp->config_addr &&
260
-	   (tmp->config_addr == pe->config_addr))
268
+	if (*target_pe == pe->addr)
261269 		return pe;
262270 
263271 	return NULL;
....@@ -267,7 +275,6 @@
267275  * eeh_pe_get - Search PE based on the given address
268276  * @phb: PCI controller
269277  * @pe_no: PE number
270
- * @config_addr: Config address
271278  *
272279  * Search the corresponding PE based on the specified address which
273280  * is included in the eeh device. The function is used to check if
....@@ -276,76 +283,30 @@
276283  * which is composed of PCI bus/device/function number, or unified
277284  * PE address.
278285  */
279
-struct eeh_pe *eeh_pe_get(struct pci_controller *phb,
280
-		int pe_no, int config_addr)
286
+struct eeh_pe *eeh_pe_get(struct pci_controller *phb, int pe_no)
281287 {
282288 	struct eeh_pe *root = eeh_phb_pe_get(phb);
283
-	struct eeh_pe_get_flag tmp = { pe_no, config_addr };
284
-	struct eeh_pe *pe;
285289 
286
-	pe = eeh_pe_traverse(root, __eeh_pe_get, &tmp);
287
-
288
-	return pe;
290
+	return eeh_pe_traverse(root, __eeh_pe_get, &pe_no);
289291 }
290292 
291293 /**
292
- * eeh_pe_get_parent - Retrieve the parent PE
294
+ * eeh_pe_tree_insert - Add EEH device to parent PE
293295  * @edev: EEH device
296
+ * @new_pe_parent: PE to create additional PEs under
294297  *
295
- * The whole PEs existing in the system are organized as hierarchy
296
- * tree. The function is used to retrieve the parent PE according
297
- * to the parent EEH device.
298
- */
299
-static struct eeh_pe *eeh_pe_get_parent(struct eeh_dev *edev)
300
-{
301
-	struct eeh_dev *parent;
302
-	struct pci_dn *pdn = eeh_dev_to_pdn(edev);
303
-
304
-	/*
305
-	 * It might have the case for the indirect parent
306
-	 * EEH device already having associated PE, but
307
-	 * the direct parent EEH device doesn't have yet.
308
-	 */
309
-	if (edev->physfn)
310
-		pdn = pci_get_pdn(edev->physfn);
311
-	else
312
-		pdn = pdn ? pdn->parent : NULL;
313
-	while (pdn) {
314
-		/* We're poking out of PCI territory */
315
-		parent = pdn_to_eeh_dev(pdn);
316
-		if (!parent)
317
-			return NULL;
318
-
319
-		if (parent->pe)
320
-			return parent->pe;
321
-
322
-		pdn = pdn->parent;
323
-	}
324
-
325
-	return NULL;
326
-}
327
-
328
-/**
329
- * eeh_add_to_parent_pe - Add EEH device to parent PE
330
- * @edev: EEH device
298
+ * Add EEH device to the PE in edev->pe_config_addr. If a PE already
299
+ * exists with that address then @edev is added to that PE. Otherwise
300
+ * a new PE is created and inserted into the PE tree as a child of
301
+ * @new_pe_parent.
331302  *
332
- * Add EEH device to the parent PE. If the parent PE already
333
- * exists, the PE type will be changed to EEH_PE_BUS. Otherwise,
334
- * we have to create new PE to hold the EEH device and the new
335
- * PE will be linked to its parent PE as well.
303
+ * If @new_pe_parent is NULL then the new PE will be inserted under
304
+ * directly under the the PHB.
336305  */
337
-int eeh_add_to_parent_pe(struct eeh_dev *edev)
306
+int eeh_pe_tree_insert(struct eeh_dev *edev, struct eeh_pe *new_pe_parent)
338307 {
308
+	struct pci_controller *hose = edev->controller;
339309 	struct eeh_pe *pe, *parent;
340
-	struct pci_dn *pdn = eeh_dev_to_pdn(edev);
341
-	int config_addr = (pdn->busno << 8) | (pdn->devfn);
342
-
343
-	/* Check if the PE number is valid */
344
-	if (!eeh_has_flag(EEH_VALID_PE_ZERO) && !edev->pe_config_addr) {
345
-		pr_err("%s: Invalid PE#0 for edev 0x%x on PHB#%x\n",
346
-		       __func__, config_addr, pdn->phb->global_number);
347
-		return -EINVAL;
348
-	}
349310 
350311 	/*
351312 	 * Search the PE has been existing or not according
....@@ -353,57 +314,48 @@
353314 	 * PE should be composed of PCI bus and its subordinate
354315 	 * components.
355316 	 */
356
-	pe = eeh_pe_get(pdn->phb, edev->pe_config_addr, config_addr);
357
-	if (pe && !(pe->type & EEH_PE_INVALID)) {
358
-		/* Mark the PE as type of PCI bus */
359
-		pe->type = EEH_PE_BUS;
360
-		edev->pe = pe;
317
+	pe = eeh_pe_get(hose, edev->pe_config_addr);
318
+	if (pe) {
319
+		if (pe->type & EEH_PE_INVALID) {
320
+			list_add_tail(&edev->entry, &pe->edevs);
321
+			edev->pe = pe;
322
+			/*
323
+			 * We're running to here because of PCI hotplug caused by
324
+			 * EEH recovery. We need clear EEH_PE_INVALID until the top.
325
+			 */
326
+			parent = pe;
327
+			while (parent) {
328
+				if (!(parent->type & EEH_PE_INVALID))
329
+					break;
330
+				parent->type &= ~EEH_PE_INVALID;
331
+				parent = parent->parent;
332
+			}
361333 
362
-		/* Put the edev to PE */
363
-		list_add_tail(&edev->list, &pe->edevs);
364
-		pr_debug("EEH: Add %04x:%02x:%02x.%01x to Bus PE#%x\n",
365
-			 pdn->phb->global_number,
366
-			 pdn->busno,
367
-			 PCI_SLOT(pdn->devfn),
368
-			 PCI_FUNC(pdn->devfn),
369
-			 pe->addr);
370
-		return 0;
371
-	} else if (pe && (pe->type & EEH_PE_INVALID)) {
372
-		list_add_tail(&edev->list, &pe->edevs);
373
-		edev->pe = pe;
374
-		/*
375
-		 * We're running to here because of PCI hotplug caused by
376
-		 * EEH recovery. We need clear EEH_PE_INVALID until the top.
377
-		 */
378
-		parent = pe;
379
-		while (parent) {
380
-			if (!(parent->type & EEH_PE_INVALID))
381
-				break;
382
-			parent->type &= ~EEH_PE_INVALID;
383
-			parent = parent->parent;
334
+			eeh_edev_dbg(edev, "Added to existing PE (parent: PE#%x)\n",
335
+				     pe->parent->addr);
336
+		} else {
337
+			/* Mark the PE as type of PCI bus */
338
+			pe->type = EEH_PE_BUS;
339
+			edev->pe = pe;
340
+
341
+			/* Put the edev to PE */
342
+			list_add_tail(&edev->entry, &pe->edevs);
343
+			eeh_edev_dbg(edev, "Added to bus PE\n");
384344 		}
385
-
386
-		pr_debug("EEH: Add %04x:%02x:%02x.%01x to Device "
387
-			 "PE#%x, Parent PE#%x\n",
388
-			 pdn->phb->global_number,
389
-			 pdn->busno,
390
-			 PCI_SLOT(pdn->devfn),
391
-			 PCI_FUNC(pdn->devfn),
392
-			 pe->addr, pe->parent->addr);
393345 		return 0;
394346 	}
395347 
396348 	/* Create a new EEH PE */
397349 	if (edev->physfn)
398
-		pe = eeh_pe_alloc(pdn->phb, EEH_PE_VF);
350
+		pe = eeh_pe_alloc(hose, EEH_PE_VF);
399351 	else
400
-		pe = eeh_pe_alloc(pdn->phb, EEH_PE_DEVICE);
352
+		pe = eeh_pe_alloc(hose, EEH_PE_DEVICE);
401353 	if (!pe) {
402354 		pr_err("%s: out of memory!\n", __func__);
403355 		return -ENOMEM;
404356 	}
405
-	pe->addr	= edev->pe_config_addr;
406
-	pe->config_addr	= config_addr;
357
+
358
+	pe->addr = edev->pe_config_addr;
407359 
408360 	/*
409361 	 * Put the new EEH PE into hierarchy tree. If the parent
....@@ -411,39 +363,35 @@
411363 	 * to PHB directly. Otherwise, we have to associate the
412364 	 * PE with its parent.
413365 	 */
414
-	parent = eeh_pe_get_parent(edev);
415
-	if (!parent) {
416
-		parent = eeh_phb_pe_get(pdn->phb);
417
-		if (!parent) {
366
+	if (!new_pe_parent) {
367
+		new_pe_parent = eeh_phb_pe_get(hose);
368
+		if (!new_pe_parent) {
418369 			pr_err("%s: No PHB PE is found (PHB Domain=%d)\n",
419
-				__func__, pdn->phb->global_number);
370
+				__func__, hose->global_number);
420371 			edev->pe = NULL;
421372 			kfree(pe);
422373 			return -EEXIST;
423374 		}
424375 	}
425
-	pe->parent = parent;
376
+
377
+	/* link new PE into the tree */
378
+	pe->parent = new_pe_parent;
379
+	list_add_tail(&pe->child, &new_pe_parent->child_list);
426380 
427381 	/*
428382 	 * Put the newly created PE into the child list and
429383 	 * link the EEH device accordingly.
430384 	 */
431
-	list_add_tail(&pe->child, &parent->child_list);
432
-	list_add_tail(&edev->list, &pe->edevs);
385
+	list_add_tail(&edev->entry, &pe->edevs);
433386 	edev->pe = pe;
434
-	pr_debug("EEH: Add %04x:%02x:%02x.%01x to "
435
-		 "Device PE#%x, Parent PE#%x\n",
436
-		 pdn->phb->global_number,
437
-		 pdn->busno,
438
-		 PCI_SLOT(pdn->devfn),
439
-		 PCI_FUNC(pdn->devfn),
440
-		 pe->addr, pe->parent->addr);
387
+	eeh_edev_dbg(edev, "Added to new (parent: PE#%x)\n",
388
+		     new_pe_parent->addr);
441389 
442390 	return 0;
443391 }
444392 
445393 /**
446
- * eeh_rmv_from_parent_pe - Remove one EEH device from the associated PE
394
+ * eeh_pe_tree_remove - Remove one EEH device from the associated PE
447395  * @edev: EEH device
448396  *
449397  * The PE hierarchy tree might be changed when doing PCI hotplug.
....@@ -451,25 +399,21 @@
451399  * during EEH recovery. So we have to call the function remove the
452400  * corresponding PE accordingly if necessary.
453401  */
454
-int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
402
+int eeh_pe_tree_remove(struct eeh_dev *edev)
455403 {
456404 	struct eeh_pe *pe, *parent, *child;
405
+	bool keep, recover;
457406 	int cnt;
458
-	struct pci_dn *pdn = eeh_dev_to_pdn(edev);
459407 
460
-	if (!edev->pe) {
461
-		pr_debug("%s: No PE found for device %04x:%02x:%02x.%01x\n",
462
-			 __func__,  pdn->phb->global_number,
463
-			 pdn->busno,
464
-			 PCI_SLOT(pdn->devfn),
465
-			 PCI_FUNC(pdn->devfn));
408
+	pe = eeh_dev_to_pe(edev);
409
+	if (!pe) {
410
+		eeh_edev_dbg(edev, "No PE found for device.\n");
466411 		return -EEXIST;
467412 	}
468413 
469414 	/* Remove the EEH device */
470
-	pe = eeh_dev_to_pe(edev);
471415 	edev->pe = NULL;
472
-	list_del(&edev->list);
416
+	list_del(&edev->entry);
473417 
474418 	/*
475419 	 * Check if the parent PE includes any EEH devices.
....@@ -479,10 +423,21 @@
479423 	 */
480424 	while (1) {
481425 		parent = pe->parent;
426
+
427
+		/* PHB PEs should never be removed */
482428 		if (pe->type & EEH_PE_PHB)
483429 			break;
484430 
485
-		if (!(pe->state & EEH_PE_KEEP)) {
431
+		/*
432
+		 * XXX: KEEP is set while resetting a PE. I don't think it's
433
+		 * ever set without RECOVERING also being set. I could
434
+		 * be wrong though so catch that with a WARN.
435
+		 */
436
+		keep = !!(pe->state & EEH_PE_KEEP);
437
+		recover = !!(pe->state & EEH_PE_RECOVERING);
438
+		WARN_ON(keep && !recover);
439
+
440
+		if (!keep && !recover) {
486441 			if (list_empty(&pe->edevs) &&
487442 			    list_empty(&pe->child_list)) {
488443 				list_del(&pe->child);
....@@ -491,6 +446,15 @@
491446 				break;
492447 			}
493448 		} else {
449
+			/*
450
+			 * Mark the PE as invalid. At the end of the recovery
451
+			 * process any invalid PEs will be garbage collected.
452
+			 *
453
+			 * We need to delay the free()ing of them since we can
454
+			 * remove edev's while traversing the PE tree which
455
+			 * might trigger the removal of a PE and we can't
456
+			 * deal with that (yet).
457
+			 */
494458 			if (list_empty(&pe->edevs)) {
495459 				cnt = 0;
496460 				list_for_each_entry(child, &pe->child_list, child) {
....@@ -541,44 +505,6 @@
541505 }
542506 
543507 /**
544
- * __eeh_pe_state_mark - Mark the state for the PE
545
- * @data: EEH PE
546
- * @flag: state
547
- *
548
- * The function is used to mark the indicated state for the given
549
- * PE. Also, the associated PCI devices will be put into IO frozen
550
- * state as well.
551
- */
552
-static void *__eeh_pe_state_mark(struct eeh_pe *pe, void *flag)
553
-{
554
-	int state = *((int *)flag);
555
-	struct eeh_dev *edev, *tmp;
556
-	struct pci_dev *pdev;
557
-
558
-	/* Keep the state of permanently removed PE intact */
559
-	if (pe->state & EEH_PE_REMOVED)
560
-		return NULL;
561
-
562
-	pe->state |= state;
563
-
564
-	/* Offline PCI devices if applicable */
565
-	if (!(state & EEH_PE_ISOLATED))
566
-		return NULL;
567
-
568
-	eeh_pe_for_each_dev(pe, edev, tmp) {
569
-		pdev = eeh_dev_to_pci_dev(edev);
570
-		if (pdev)
571
-			pdev->error_state = pci_channel_io_frozen;
572
-	}
573
-
574
-	/* Block PCI config access if required */
575
-	if (pe->state & EEH_PE_CFG_RESTRICTED)
576
-		pe->state |= EEH_PE_CFG_BLOCKED;
577
-
578
-	return NULL;
579
-}
580
-
581
-/**
582508  * eeh_pe_state_mark - Mark specified state for PE and its associated device
583509  * @pe: EEH PE
584510  *
....@@ -586,19 +512,49 @@
586512  * is used to mark appropriate state for the affected PEs and the
587513  * associated devices.
588514  */
589
-void eeh_pe_state_mark(struct eeh_pe *pe, int state)
515
+void eeh_pe_state_mark(struct eeh_pe *root, int state)
590516 {
591
-	eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
517
+	struct eeh_pe *pe;
518
+
519
+	eeh_for_each_pe(root, pe)
520
+		if (!(pe->state & EEH_PE_REMOVED))
521
+			pe->state |= state;
592522 }
593523 EXPORT_SYMBOL_GPL(eeh_pe_state_mark);
594524 
595
-static void *__eeh_pe_dev_mode_mark(struct eeh_dev *edev, void *flag)
525
+/**
526
+ * eeh_pe_mark_isolated
527
+ * @pe: EEH PE
528
+ *
529
+ * Record that a PE has been isolated by marking the PE and it's children as
530
+ * EEH_PE_ISOLATED (and EEH_PE_CFG_BLOCKED, if required) and their PCI devices
531
+ * as pci_channel_io_frozen.
532
+ */
533
+void eeh_pe_mark_isolated(struct eeh_pe *root)
534
+{
535
+	struct eeh_pe *pe;
536
+	struct eeh_dev *edev;
537
+	struct pci_dev *pdev;
538
+
539
+	eeh_pe_state_mark(root, EEH_PE_ISOLATED);
540
+	eeh_for_each_pe(root, pe) {
541
+		list_for_each_entry(edev, &pe->edevs, entry) {
542
+			pdev = eeh_dev_to_pci_dev(edev);
543
+			if (pdev)
544
+				pdev->error_state = pci_channel_io_frozen;
545
+		}
546
+		/* Block PCI config access if required */
547
+		if (pe->state & EEH_PE_CFG_RESTRICTED)
548
+			pe->state |= EEH_PE_CFG_BLOCKED;
549
+	}
550
+}
551
+EXPORT_SYMBOL_GPL(eeh_pe_mark_isolated);
552
+
553
+static void __eeh_pe_dev_mode_mark(struct eeh_dev *edev, void *flag)
596554 {
597555 	int mode = *((int *)flag);
598556 
599557 	edev->mode |= mode;
600
-
601
-	return NULL;
602558 }
603559 
604560 /**
....@@ -613,84 +569,52 @@
613569 }
614570 
615571 /**
616
- * __eeh_pe_state_clear - Clear state for the PE
572
+ * eeh_pe_state_clear - Clear state for the PE
617573  * @data: EEH PE
618
- * @flag: state
574
+ * @state: state
575
+ * @include_passed: include passed-through devices?
619576  *
620577  * The function is used to clear the indicated state from the
621578  * given PE. Besides, we also clear the check count of the PE
622579  * as well.
623580  */
624
-static void *__eeh_pe_state_clear(struct eeh_pe *pe, void *flag)
581
+void eeh_pe_state_clear(struct eeh_pe *root, int state, bool include_passed)
625582 {
626
-	int state = *((int *)flag);
583
+	struct eeh_pe *pe;
627584 	struct eeh_dev *edev, *tmp;
628585 	struct pci_dev *pdev;
629586 
630
-	/* Keep the state of permanently removed PE intact */
631
-	if (pe->state & EEH_PE_REMOVED)
632
-		return NULL;
633
-
634
-	pe->state &= ~state;
635
-
636
-	/*
637
-	 * Special treatment on clearing isolated state. Clear
638
-	 * check count since last isolation and put all affected
639
-	 * devices to normal state.
640
-	 */
641
-	if (!(state & EEH_PE_ISOLATED))
642
-		return NULL;
643
-
644
-	pe->check_count = 0;
645
-	eeh_pe_for_each_dev(pe, edev, tmp) {
646
-		pdev = eeh_dev_to_pci_dev(edev);
647
-		if (!pdev)
587
+	eeh_for_each_pe(root, pe) {
588
+		/* Keep the state of permanently removed PE intact */
589
+		if (pe->state & EEH_PE_REMOVED)
648590 			continue;
649591 
650
-		pdev->error_state = pci_channel_io_normal;
592
+		if (!include_passed && eeh_pe_passed(pe))
593
+			continue;
594
+
595
+		pe->state &= ~state;
596
+
597
+		/*
598
+		 * Special treatment on clearing isolated state. Clear
599
+		 * check count since last isolation and put all affected
600
+		 * devices to normal state.
601
+		 */
602
+		if (!(state & EEH_PE_ISOLATED))
603
+			continue;
604
+
605
+		pe->check_count = 0;
606
+		eeh_pe_for_each_dev(pe, edev, tmp) {
607
+			pdev = eeh_dev_to_pci_dev(edev);
608
+			if (!pdev)
609
+				continue;
610
+
611
+			pdev->error_state = pci_channel_io_normal;
612
+		}
613
+
614
+		/* Unblock PCI config access if required */
615
+		if (pe->state & EEH_PE_CFG_RESTRICTED)
616
+			pe->state &= ~EEH_PE_CFG_BLOCKED;
651617 	}
652
-
653
-	/* Unblock PCI config access if required */
654
-	if (pe->state & EEH_PE_CFG_RESTRICTED)
655
-		pe->state &= ~EEH_PE_CFG_BLOCKED;
656
-
657
-	return NULL;
658
-}
659
-
660
-/**
661
- * eeh_pe_state_clear - Clear state for the PE and its children
662
- * @pe: PE
663
- * @state: state to be cleared
664
- *
665
- * When the PE and its children has been recovered from error,
666
- * we need clear the error state for that. The function is used
667
- * for the purpose.
668
- */
669
-void eeh_pe_state_clear(struct eeh_pe *pe, int state)
670
-{
671
-	eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
672
-}
673
-
674
-/**
675
- * eeh_pe_state_mark_with_cfg - Mark PE state with unblocked config space
676
- * @pe: PE
677
- * @state: PE state to be set
678
- *
679
- * Set specified flag to PE and its child PEs. The PCI config space
680
- * of some PEs is blocked automatically when EEH_PE_ISOLATED is set,
681
- * which isn't needed in some situations. The function allows to set
682
- * the specified flag to indicated PEs without blocking their PCI
683
- * config space.
684
- */
685
-void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state)
686
-{
687
-	eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
688
-	if (!(state & EEH_PE_ISOLATED))
689
-		return;
690
-
691
-	/* Clear EEH_PE_CFG_BLOCKED, which might be set just now */
692
-	state = EEH_PE_CFG_BLOCKED;
693
-	eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
694618 }
695619 
696620 /*
....@@ -706,7 +630,6 @@
706630  */
707631 static void eeh_bridge_check_link(struct eeh_dev *edev)
708632 {
709
-	struct pci_dn *pdn = eeh_dev_to_pdn(edev);
710633 	int cap;
711634 	uint32_t val;
712635 	int timeout = 0;
....@@ -718,42 +641,38 @@
718641 	if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT)))
719642 		return;
720643 
721
-	pr_debug("%s: Check PCIe link for %04x:%02x:%02x.%01x ...\n",
722
-		 __func__, pdn->phb->global_number,
723
-		 pdn->busno,
724
-		 PCI_SLOT(pdn->devfn),
725
-		 PCI_FUNC(pdn->devfn));
644
+	eeh_edev_dbg(edev, "Checking PCIe link...\n");
726645 
727646 	/* Check slot status */
728647 	cap = edev->pcie_cap;
729
-	eeh_ops->read_config(pdn, cap + PCI_EXP_SLTSTA, 2, &val);
648
+	eeh_ops->read_config(edev, cap + PCI_EXP_SLTSTA, 2, &val);
730649 	if (!(val & PCI_EXP_SLTSTA_PDS)) {
731
-		pr_debug("  No card in the slot (0x%04x) !\n", val);
650
+		eeh_edev_dbg(edev, "No card in the slot (0x%04x) !\n", val);
732651 		return;
733652 	}
734653 
735654 	/* Check power status if we have the capability */
736
-	eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCAP, 2, &val);
655
+	eeh_ops->read_config(edev, cap + PCI_EXP_SLTCAP, 2, &val);
737656 	if (val & PCI_EXP_SLTCAP_PCP) {
738
-		eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCTL, 2, &val);
657
+		eeh_ops->read_config(edev, cap + PCI_EXP_SLTCTL, 2, &val);
739658 		if (val & PCI_EXP_SLTCTL_PCC) {
740
-			pr_debug("  In power-off state, power it on ...\n");
659
+			eeh_edev_dbg(edev, "In power-off state, power it on ...\n");
741660 			val &= ~(PCI_EXP_SLTCTL_PCC | PCI_EXP_SLTCTL_PIC);
742661 			val |= (0x0100 & PCI_EXP_SLTCTL_PIC);
743
-			eeh_ops->write_config(pdn, cap + PCI_EXP_SLTCTL, 2, val);
662
+			eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val);
744663 			msleep(2 * 1000);
745664 		}
746665 	}
747666 
748667 	/* Enable link */
749
-	eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCTL, 2, &val);
668
+	eeh_ops->read_config(edev, cap + PCI_EXP_LNKCTL, 2, &val);
750669 	val &= ~PCI_EXP_LNKCTL_LD;
751
-	eeh_ops->write_config(pdn, cap + PCI_EXP_LNKCTL, 2, val);
670
+	eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val);
752671 
753672 	/* Check link */
754
-	eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCAP, 4, &val);
673
+	eeh_ops->read_config(edev, cap + PCI_EXP_LNKCAP, 4, &val);
755674 	if (!(val & PCI_EXP_LNKCAP_DLLLARC)) {
756
-		pr_debug("  No link reporting capability (0x%08x) \n", val);
675
+		eeh_edev_dbg(edev, "No link reporting capability (0x%08x) \n", val);
757676 		msleep(1000);
758677 		return;
759678 	}
....@@ -764,16 +683,16 @@
764683 		msleep(20);
765684 		timeout += 20;
766685 
767
-		eeh_ops->read_config(pdn, cap + PCI_EXP_LNKSTA, 2, &val);
686
+		eeh_ops->read_config(edev, cap + PCI_EXP_LNKSTA, 2, &val);
768687 		if (val & PCI_EXP_LNKSTA_DLLLA)
769688 			break;
770689 	}
771690 
772691 	if (val & PCI_EXP_LNKSTA_DLLLA)
773
-		pr_debug("  Link up (%s)\n",
692
+		eeh_edev_dbg(edev, "Link up (%s)\n",
774693 			 (val & PCI_EXP_LNKSTA_CLS_2_5GB) ? "2.5GB" : "5GB");
775694 	else
776
-		pr_debug("  Link not ready (0x%04x)\n", val);
695
+		eeh_edev_dbg(edev, "Link not ready (0x%04x)\n", val);
777696 }
778697 
779698 #define BYTE_SWAP(OFF)	(8*((OFF)/4)+3-(OFF))
....@@ -781,7 +700,6 @@
781700 
782701 static void eeh_restore_bridge_bars(struct eeh_dev *edev)
783702 {
784
-	struct pci_dn *pdn = eeh_dev_to_pdn(edev);
785703 	int i;
786704 
787705 	/*
....@@ -789,20 +707,20 @@
789707 	 * Bus numbers and windows: 0x18 - 0x30
790708 	 */
791709 	for (i = 4; i < 13; i++)
792
-		eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
710
+		eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]);
793711 	/* Rom: 0x38 */
794
-	eeh_ops->write_config(pdn, 14*4, 4, edev->config_space[14]);
712
+	eeh_ops->write_config(edev, 14*4, 4, edev->config_space[14]);
795713 
796714 	/* Cache line & Latency timer: 0xC 0xD */
797
-	eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
715
+	eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1,
798716                 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
799
-        eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
800
-                SAVED_BYTE(PCI_LATENCY_TIMER));
717
+	eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1,
718
+		SAVED_BYTE(PCI_LATENCY_TIMER));
801719 	/* Max latency, min grant, interrupt ping and line: 0x3C */
802
-	eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
720
+	eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]);
803721 
804722 	/* PCI Command: 0x4 */
805
-	eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1] |
723
+	eeh_ops->write_config(edev, PCI_COMMAND, 4, edev->config_space[1] |
806724 			      PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
807725 
808726 	/* Check the PCIe link is ready */
....@@ -811,28 +729,27 @@
811729 
812730 static void eeh_restore_device_bars(struct eeh_dev *edev)
813731 {
814
-	struct pci_dn *pdn = eeh_dev_to_pdn(edev);
815732 	int i;
816733 	u32 cmd;
817734 
818735 	for (i = 4; i < 10; i++)
819
-		eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
736
+		eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]);
820737 	/* 12 == Expansion ROM Address */
821
-	eeh_ops->write_config(pdn, 12*4, 4, edev->config_space[12]);
738
+	eeh_ops->write_config(edev, 12*4, 4, edev->config_space[12]);
822739 
823
-	eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
740
+	eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1,
824741 		SAVED_BYTE(PCI_CACHE_LINE_SIZE));
825
-	eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
742
+	eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1,
826743 		SAVED_BYTE(PCI_LATENCY_TIMER));
827744 
828745 	/* max latency, min grant, interrupt pin and line */
829
-	eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
746
+	eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]);
830747 
831748 	/*
832749 	 * Restore PERR & SERR bits, some devices require it,
833750 	 * don't touch the other command bits
834751 	 */
835
-	eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cmd);
752
+	eeh_ops->read_config(edev, PCI_COMMAND, 4, &cmd);
836753 	if (edev->config_space[1] & PCI_COMMAND_PARITY)
837754 		cmd |= PCI_COMMAND_PARITY;
838755 	else
....@@ -841,7 +758,7 @@
841758 		cmd |= PCI_COMMAND_SERR;
842759 	else
843760 		cmd &= ~PCI_COMMAND_SERR;
844
-	eeh_ops->write_config(pdn, PCI_COMMAND, 4, cmd);
761
+	eeh_ops->write_config(edev, PCI_COMMAND, 4, cmd);
845762 }
846763 
847764 /**
....@@ -853,20 +770,16 @@
853770  * the expansion ROM base address, the latency timer, and etc.
854771  * from the saved values in the device node.
855772  */
856
-static void *eeh_restore_one_device_bars(struct eeh_dev *edev, void *flag)
773
+static void eeh_restore_one_device_bars(struct eeh_dev *edev, void *flag)
857774 {
858
-	struct pci_dn *pdn = eeh_dev_to_pdn(edev);
859
-
860775 	/* Do special restore for bridges */
861776 	if (edev->mode & EEH_DEV_BRIDGE)
862777 		eeh_restore_bridge_bars(edev);
863778 	else
864779 		eeh_restore_device_bars(edev);
865780 
866
-	if (eeh_ops->restore_config && pdn)
867
-		eeh_ops->restore_config(pdn);
868
-
869
-	return NULL;
781
+	if (eeh_ops->restore_config)
782
+		eeh_ops->restore_config(edev);
870783 }
871784 
872785 /**
....@@ -945,7 +858,7 @@
945858 		return pe->bus;
946859 
947860 	/* Retrieve the parent PCI bus of first (top) PCI device */
948
-	edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, list);
861
+	edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, entry);
949862 	pdev = eeh_dev_to_pci_dev(edev);
950863 	if (pdev)
951864 		return pdev->bus;