add new system file

hc

2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/arch/powerpc/include/asm/perf_event.h
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@@ -1,3 +1,4 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /*
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  * Performance event support - hardware-specific disambiguation
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  *
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@@ -7,15 +8,12 @@
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  * devices other than the core which provide their own performance counters.
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  *
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  * Copyright 2010 Freescale Semiconductor, Inc.
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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 #ifdef CONFIG_PPC_PERF_CTRS
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 #include <asm/perf_event_server.h>
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+#else
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+static inline bool is_sier_available(void) { return false; }
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 #endif
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 #ifdef CONFIG_FSL_EMB_PERF_EVENT
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@@ -26,6 +24,8 @@
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 #include <asm/ptrace.h>
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 #include <asm/reg.h>
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+#define perf_arch_bpf_user_pt_regs(regs) &regs->user_regs
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+
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 /*
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  * Overload regs->result to specify whether we should use the MSR (result
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  * is zero) or the SIAR (result is non zero).
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@@ -34,7 +34,13 @@
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 	do {							\
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 		(regs)->result = 0;				\
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 		(regs)->nip = __ip;				\
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-		(regs)->gpr[1] = current_stack_pointer();	\
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+		(regs)->gpr[1] = current_stack_frame();		\
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 		asm volatile("mfmsr %0" : "=r" ((regs)->msr));	\
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 	} while (0)
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+
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+/* To support perf_regs sier update */
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+extern bool is_sier_available(void);
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+/* To define perf extended regs mask value */
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+extern u64 PERF_REG_EXTENDED_MASK;
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+#define PERF_REG_EXTENDED_MASK	PERF_REG_EXTENDED_MASK
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 #endif