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hc
2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/arch/powerpc/include/asm/mmu.h
....@@ -29,6 +29,19 @@
2929  */
3030 
3131 /*
32
+ * Support for KUEP feature.
33
+ */
34
+#define MMU_FTR_KUEP			ASM_CONST(0x00000400)
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+
36
+/*
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+ * Support for memory protection keys.
38
+ */
39
+#define MMU_FTR_PKEY			ASM_CONST(0x00000800)
40
+
41
+/* Guest Translation Shootdown Enable */
42
+#define MMU_FTR_GTSE			ASM_CONST(0x00001000)
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+
44
+/*
3245  * Support for 68 bit VA space. We added that from ISA 2.05
3346  */
3447 #define MMU_FTR_68_BIT_VA		ASM_CONST(0x00002000)
....@@ -48,7 +61,7 @@
4861 #define MMU_FTR_USE_HIGH_BATS		ASM_CONST(0x00010000)
4962 
5063 /* Enable >32-bit physical addresses on 32-bit processor, only used
51
- * by CONFIG_6xx currently as BookE supports that from day 1
64
+ * by CONFIG_PPC_BOOK3S_32 currently as BookE supports that from day 1
5265  */
5366 #define MMU_FTR_BIG_PHYS		ASM_CONST(0x00020000)
5467 
....@@ -107,6 +120,11 @@
107120  */
108121 #define MMU_FTR_1T_SEGMENT		ASM_CONST(0x40000000)
109122 
123
+/*
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+ * Supports KUAP (key 0 controlling userspace addresses) on radix
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+ */
126
+#define MMU_FTR_RADIX_KUAP		ASM_CONST(0x80000000)
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+
110128 /* MMU feature bit sets for various CPUs */
111129 #define MMU_FTRS_DEFAULT_HPTE_ARCH_V2	\
112130 	MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2
....@@ -117,6 +135,7 @@
117135 #define MMU_FTRS_POWER7		MMU_FTRS_POWER6
118136 #define MMU_FTRS_POWER8		MMU_FTRS_POWER6
119137 #define MMU_FTRS_POWER9		MMU_FTRS_POWER6
138
+#define MMU_FTRS_POWER10	MMU_FTRS_POWER6
120139 #define MMU_FTRS_CELL		MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
121140 				MMU_FTR_CI_LARGE_PAGE
122141 #define MMU_FTRS_PA6T		MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
....@@ -124,6 +143,9 @@
124143 #ifndef __ASSEMBLY__
125144 #include <linux/bug.h>
126145 #include <asm/cputable.h>
146
+#include <asm/page.h>
147
+
148
+typedef pte_t *pgtable_t;
127149 
128150 #ifdef CONFIG_PPC_FSL_BOOK3E
129151 #include <asm/percpu.h>
....@@ -131,19 +153,51 @@
131153 #endif
132154 
133155 enum {
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-	MMU_FTRS_POSSIBLE = MMU_FTR_HPTE_TABLE | MMU_FTR_TYPE_8xx |
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-		MMU_FTR_TYPE_40x | MMU_FTR_TYPE_44x | MMU_FTR_TYPE_FSL_E |
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-		MMU_FTR_TYPE_47x | MMU_FTR_USE_HIGH_BATS | MMU_FTR_BIG_PHYS |
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-		MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_USE_TLBILX |
138
-		MMU_FTR_LOCK_BCAST_INVAL | MMU_FTR_NEED_DTLB_SW_LRU |
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+	MMU_FTRS_POSSIBLE =
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+#ifdef CONFIG_PPC_BOOK3S
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+		MMU_FTR_HPTE_TABLE |
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+#endif
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+#ifdef CONFIG_PPC_8xx
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+		MMU_FTR_TYPE_8xx |
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+#endif
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+#ifdef CONFIG_40x
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+		MMU_FTR_TYPE_40x |
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+#endif
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+#ifdef CONFIG_44x
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+		MMU_FTR_TYPE_44x |
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+#endif
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+#if defined(CONFIG_E200) || defined(CONFIG_E500)
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+		MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX |
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+#endif
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+#ifdef CONFIG_PPC_47x
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+		MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL |
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+#endif
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+#ifdef CONFIG_PPC_BOOK3S_32
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+		MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU |
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+#endif
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+#ifdef CONFIG_PPC_BOOK3E_64
139179 		MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
180
+#endif
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+#ifdef CONFIG_PPC_BOOK3S_64
140182 		MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
141183 		MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
142184 		MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA |
143185 		MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |
186
+#endif
144187 #ifdef CONFIG_PPC_RADIX_MMU
145188 		MMU_FTR_TYPE_RADIX |
189
+		MMU_FTR_GTSE |
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+#ifdef CONFIG_PPC_KUAP
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+		MMU_FTR_RADIX_KUAP |
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+#endif /* CONFIG_PPC_KUAP */
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+#endif /* CONFIG_PPC_RADIX_MMU */
194
+#ifdef CONFIG_PPC_MEM_KEYS
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+	MMU_FTR_PKEY |
146196 #endif
197
+#ifdef CONFIG_PPC_KUEP
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+	MMU_FTR_KUEP |
199
+#endif /* CONFIG_PPC_KUAP */
200
+
147201 		0,
148202 };
149203 
....@@ -225,7 +279,7 @@
225279 /* Functions for creating and updating partition table on POWER9 */
226280 extern void mmu_partition_table_init(void);
227281 extern void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
228
-					  unsigned long dw1);
282
+					  unsigned long dw1, bool flush);
229283 #endif /* CONFIG_PPC64 */
230284 
231285 struct mm_struct;
....@@ -259,15 +313,17 @@
259313 }
260314 #endif
261315 
262
-#ifdef CONFIG_PPC_MEM_KEYS
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-extern u16 get_mm_addr_key(struct mm_struct *mm, unsigned long address);
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-#else
265
-static inline u16 get_mm_addr_key(struct mm_struct *mm, unsigned long address)
316
+#ifdef CONFIG_STRICT_KERNEL_RWX
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+static inline bool strict_kernel_rwx_enabled(void)
266318 {
267
-	return 0;
319
+	return rodata_enabled;
268320 }
269
-#endif /* CONFIG_PPC_MEM_KEYS */
270
-
321
+#else
322
+static inline bool strict_kernel_rwx_enabled(void)
323
+{
324
+	return false;
325
+}
326
+#endif
271327 #endif /* !__ASSEMBLY__ */
272328 
273329 /* The kernel use the constants below to index in the page sizes array.
....@@ -320,24 +376,18 @@
320376 extern void setup_initial_memory_limit(phys_addr_t first_memblock_base,
321377 				       phys_addr_t first_memblock_size);
322378 static inline void mmu_early_init_devtree(void) { }
379
+
380
+static inline void pkey_early_init_devtree(void) {}
381
+
382
+extern void *abatron_pteptrs[2];
323383 #endif /* __ASSEMBLY__ */
324384 #endif
325385 
326
-#if defined(CONFIG_PPC_STD_MMU_32)
386
+#if defined(CONFIG_PPC_BOOK3S_32)
327387 /* 32-bit classic hash table MMU */
328388 #include <asm/book3s/32/mmu-hash.h>
329
-#elif defined(CONFIG_40x)
330
-/* 40x-style software loaded TLB */
331
-#  include <asm/mmu-40x.h>
332
-#elif defined(CONFIG_44x)
333
-/* 44x-style software loaded TLB */
334
-#  include <asm/mmu-44x.h>
335
-#elif defined(CONFIG_PPC_BOOK3E_MMU)
336
-/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
337
-#  include <asm/mmu-book3e.h>
338
-#elif defined (CONFIG_PPC_8xx)
339
-/* Motorola/Freescale 8xx software loaded TLB */
340
-#  include <asm/mmu-8xx.h>
389
+#elif defined(CONFIG_PPC_MMU_NOHASH)
390
+#include <asm/nohash/mmu.h>
341391 #endif
342392 
343393 #endif /* __KERNEL__ */