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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c 
 kernel/arch/powerpc/include/asm/cacheflush.h
....@@ -1,28 +1,12 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
2
- *  This program is free software; you can redistribute it and/or
3
- *  modify it under the terms of the GNU General Public License
4
- *  as published by the Free Software Foundation; either version
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- *  2 of the License, or (at your option) any later version.
63  */
74 #ifndef _ASM_POWERPC_CACHEFLUSH_H
85 #define _ASM_POWERPC_CACHEFLUSH_H
96 
10
-#ifdef __KERNEL__
11
-
127 #include <linux/mm.h>
138 #include <asm/cputable.h>
14
-
15
-/*
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- * No cache flushing is required when address mappings are changed,
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- * because the caches on PowerPCs are physically addressed.
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- */
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-#define flush_cache_all()			do { } while (0)
20
-#define flush_cache_mm(mm)			do { } while (0)
21
-#define flush_cache_dup_mm(mm)			do { } while (0)
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-#define flush_cache_range(vma, start, end)	do { } while (0)
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-#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
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-#define flush_icache_page(vma, page)		do { } while (0)
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-#define flush_cache_vunmap(start, end)		do { } while (0)
9
+#include <asm/cpu_has_feature.h>
2610 
2711 #ifdef CONFIG_PPC_BOOK3S_64
2812 /*
....@@ -36,44 +20,45 @@
3620 {
3721 	asm volatile("ptesync" ::: "memory");
3822 }
39
-#else
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-static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
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-#endif
23
+#define flush_cache_vmap flush_cache_vmap
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+#endif /* CONFIG_PPC_BOOK3S_64 */
4225 
4326 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
4427 extern void flush_dcache_page(struct page *page);
45
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
46
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
4728 
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-extern void flush_icache_range(unsigned long, unsigned long);
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-extern void flush_icache_user_range(struct vm_area_struct *vma,
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-				    struct page *page, unsigned long addr,
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-				    int len);
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-extern void __flush_dcache_icache(void *page_va);
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-extern void flush_dcache_icache_page(struct page *page);
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-#if defined(CONFIG_PPC32) && !defined(CONFIG_BOOKE)
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-extern void __flush_dcache_icache_phys(unsigned long physaddr);
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-#else
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-static inline void __flush_dcache_icache_phys(unsigned long physaddr)
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-{
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-	BUG();
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-}
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-#endif
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+void flush_icache_range(unsigned long start, unsigned long stop);
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+#define flush_icache_range flush_icache_range
6231 
63
-#ifdef CONFIG_PPC32
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-/*
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- * Write any modified data cache blocks out to memory and invalidate them.
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- * Does not invalidate the corresponding instruction cache blocks.
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+void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
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+		unsigned long addr, int len);
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+#define flush_icache_user_page flush_icache_user_page
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+
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+void flush_dcache_icache_page(struct page *page);
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+void __flush_dcache_icache(void *page);
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+
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+/**
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+ * flush_dcache_range(): Write any modified data cache blocks out to memory and
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+ * invalidate them. Does not invalidate the corresponding instruction cache
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+ * blocks.
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+ *
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+ * @start: the start address
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+ * @stop: the stop address (exclusive)
6746  */
6847 static inline void flush_dcache_range(unsigned long start, unsigned long stop)
6948 {
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-	void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
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-	unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
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+	unsigned long shift = l1_dcache_shift();
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+	unsigned long bytes = l1_dcache_bytes();
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+	void *addr = (void *)(start & ~(bytes - 1));
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+	unsigned long size = stop - (unsigned long)addr + (bytes - 1);
7253 	unsigned long i;
7354 
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-	for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
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+	if (IS_ENABLED(CONFIG_PPC64))
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+		mb();	/* sync */
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+
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+	for (i = 0; i < size >> shift; i++, addr += bytes)
7559 		dcbf(addr);
7660 	mb();	/* sync */
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+
7762 }
7863 
7964 /*
....@@ -83,11 +68,13 @@
8368  */
8469 static inline void clean_dcache_range(unsigned long start, unsigned long stop)
8570 {
86
-	void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
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-	unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
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+	unsigned long shift = l1_dcache_shift();
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+	unsigned long bytes = l1_dcache_bytes();
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+	void *addr = (void *)(start & ~(bytes - 1));
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+	unsigned long size = stop - (unsigned long)addr + (bytes - 1);
8875 	unsigned long i;
8976 
90
-	for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
77
+	for (i = 0; i < size >> shift; i++, addr += bytes)
9178 		dcbst(addr);
9279 	mb();	/* sync */
9380 }
....@@ -100,29 +87,27 @@
10087 static inline void invalidate_dcache_range(unsigned long start,
10188 					   unsigned long stop)
10289 {
103
-	void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
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-	unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
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+	unsigned long shift = l1_dcache_shift();
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+	unsigned long bytes = l1_dcache_bytes();
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+	void *addr = (void *)(start & ~(bytes - 1));
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+	unsigned long size = stop - (unsigned long)addr + (bytes - 1);
10594 	unsigned long i;
10695 
107
-	for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
96
+	for (i = 0; i < size >> shift; i++, addr += bytes)
10897 		dcbi(addr);
10998 	mb();	/* sync */
11099 }
111100 
112
-#endif /* CONFIG_PPC32 */
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-#ifdef CONFIG_PPC64
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-extern void flush_dcache_range(unsigned long start, unsigned long stop);
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-extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
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+#ifdef CONFIG_4xx
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+static inline void flush_instruction_cache(void)
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+{
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+	iccci((void *)KERNELBASE);
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+	isync();
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+}
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+#else
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+void flush_instruction_cache(void);
116109 #endif
117110 
118
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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-	do { \
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-		memcpy(dst, src, len); \
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-		flush_icache_user_range(vma, page, vaddr, len); \
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-	} while (0)
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-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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-	memcpy(dst, src, len)
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-
126
-#endif /* __KERNEL__ */
111
+#include <asm-generic/cacheflush.h>
127112 
128113 #endif /* _ASM_POWERPC_CACHEFLUSH_H */